diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-24 20:13:20 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-24 20:13:20 +0000 |
| commit | e1bf387ec851e56819e4fdd965bc8bdd67167449 (patch) | |
| tree | debf10a18be4bc126d9eb3743a6c3258c5b2463d /target-mips/translate.c | |
| parent | 7872368461d25d14229b72fbe4b9b557c5f75a87 (diff) | |
T1 is now dead.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4787 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index de2ee21836..106d355923 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -423,7 +423,7 @@ enum { }; /* global register indices */ -static TCGv cpu_env, current_tc_gprs, current_tc_hi, current_fpu, cpu_T[2]; +static TCGv cpu_env, current_tc_gprs, current_tc_hi, current_fpu, cpu_T[1]; /* FPU TNs, global for now. */ static TCGv fpu32_T[3], fpu64_T[3], fpu32h_T[3]; @@ -8072,11 +8072,8 @@ static void mips_tcg_init(void) #if TARGET_LONG_BITS > HOST_LONG_BITS cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0, offsetof(CPUState, t0), "T0"); - cpu_T[1] = tcg_global_mem_new(TCG_TYPE_TL, - TCG_AREG0, offsetof(CPUState, t1), "T1"); #else cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0"); - cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1"); #endif /* register helpers */ |