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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2006-12-07 16:22:15 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2006-12-07 16:22:15 +0000
commitaa328addc0ed51751baa758c1eeb978c6fb77c74 (patch)
tree694d58bccdfd98575ce0c8aaf91911ace87b4bea /target-mips/translate.c
parente1449664164bff3b549a3b8e07ecdd0984fef53d (diff)
Fix reset handling, CP0 isn't enabled by default (a fact which doesn't
matter when running in kernel space). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2228 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
-rw-r--r--target-mips/translate.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 16b73a1482..5b95c41bdc 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -2817,8 +2817,8 @@ static void gen_cp0 (DisasContext *ctx, uint32_t opc, int rt, int rd)
{
const char *opn = "unk";
- if (!(ctx->CP0_Status & (1 << CP0St_CU0)) &&
- (ctx->hflags & MIPS_HFLAG_UM) &&
+ if ((!ctx->CP0_Status & (1 << CP0St_CU0) &&
+ (ctx->hflags & MIPS_HFLAG_UM)) &&
!(ctx->hflags & MIPS_HFLAG_ERL) &&
!(ctx->hflags & MIPS_HFLAG_EXL)) {
if (loglevel & CPU_LOG_TB_IN_ASM) {
@@ -4048,6 +4048,14 @@ void cpu_reset (CPUMIPSState *env)
tlb_flush(env, 1);
/* Minimal init */
+ if (env->hflags & MIPS_HFLAG_BMASK) {
+ /* If the exception was raised from a delay slot,
+ * come back to the jump. */
+ env->CP0_ErrorEPC = env->PC - 4;
+ env->hflags &= ~MIPS_HFLAG_BMASK;
+ } else {
+ env->CP0_ErrorEPC = env->PC;
+ }
env->PC = 0xBFC00000;
#if defined (MIPS_USES_R4K_TLB)
env->CP0_random = MIPS_TLB_NB - 1;
@@ -4060,7 +4068,7 @@ void cpu_reset (CPUMIPSState *env)
env->CP0_Config1 = MIPS_CONFIG1;
env->CP0_Config2 = MIPS_CONFIG2;
env->CP0_Config3 = MIPS_CONFIG3;
- env->CP0_Status = (1 << CP0St_CU0) | (1 << CP0St_BEV);
+ env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL);
env->CP0_WatchLo = 0;
env->hflags = MIPS_HFLAG_ERL;
/* Count register increments in debug mode, EJTAG version 1 */