diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-24 18:01:23 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-24 18:01:23 +0000 |
| commit | b29a0341d7ed7e7df4bf77a41db8e614f1ddb645 (patch) | |
| tree | 215d496c3ffb1136a1a2c44c4d42fe2da5a6bd0a /target-mips/translate.c | |
| parent | 4de9b249d37c1b382cc3e5a21fad1b4a11cec2fa (diff) | |
EBase is limited to KSEG0/KSEG1 even on 64bit CPUs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2351 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 3cc8a55d4e..ce56bb0834 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -3099,7 +3099,7 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel) rn = "PRid"; break; case 1: - gen_op_dmfc0_ebase(); + gen_op_mfc0_ebase(); rn = "EBase"; break; default: @@ -3683,7 +3683,7 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel) rn = "PRid"; break; case 1: - gen_op_dmtc0_ebase(); + gen_op_mtc0_ebase(); rn = "EBase"; break; default: @@ -5305,7 +5305,7 @@ void cpu_reset (CPUMIPSState *env) #endif env->CP0_Wired = 0; /* SMP not implemented */ - env->CP0_EBase = (int32_t)0x80000000; + env->CP0_EBase = 0x80000000; env->CP0_Config0 = MIPS_CONFIG0; env->CP0_Config1 = MIPS_CONFIG1; env->CP0_Config2 = MIPS_CONFIG2; |