diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-17 15:26:47 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-17 15:26:47 +0000 |
| commit | fcb4a419f52e538b68510a68f30d8834dd211155 (patch) | |
| tree | dde98a86a29d51b875dba98d448e1ae18c0f691d /target-mips/translate.c | |
| parent | 04f20795ac815cf3ad5d1fdc99462f60eb871f25 (diff) | |
Choose number of TLBs at runtime, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 35c98aba77..3035ea26f0 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -5430,10 +5430,6 @@ void cpu_reset (CPUMIPSState *env) } env->hflags = 0; env->PC = (int32_t)0xBFC00000; -#if defined (MIPS_USES_R4K_TLB) - env->CP0_Random = MIPS_TLB_NB - 1; - env->tlb_in_use = MIPS_TLB_NB; -#endif env->CP0_Wired = 0; /* SMP not implemented */ env->CP0_EBase = 0x80000000; |