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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-11 02:24:14 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-11 02:24:14 +0000
commitb48cfdffd9f15432355c8e4ed9d2781eab9e4358 (patch)
tree1f2fd6d73b632641afb3bbeb344247aa0647ae9c /target-mips/translate.c
parent2423f6601a19fa0ac4eac360de9d3fe80a18d715 (diff)
Throw RI for invalid MFMC0-class instructions. Introduce optional
MIPS_STRICT_STANDARD define to adhere more to the spec than it makes sense in normal operation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2650 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
-rw-r--r--target-mips/translate.c16
1 files changed, 13 insertions, 3 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 1701607620..96ae2cd676 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -305,7 +305,7 @@ enum {
};
/* MFMC0 opcodes */
-#define MASK_MFMC0(op) MASK_CP0(op) | (op & ((0x0C << 11) | (1 << 5)))
+#define MASK_MFMC0(op) MASK_CP0(op) | (op & 0xFFFF)
enum {
OPC_DI = (0 << 5) | (0x0C << 11) | OPC_MFMC0,
@@ -4715,8 +4715,13 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
case OPC_MTLO: /* Move to HI/LO */
gen_HILO(ctx, op1, rs);
break;
- case OPC_PMON: /* Pmon entry point */
+ case OPC_PMON: /* Pmon entry point, also R4010 selsl */
+#ifdef MIPS_STRICT_STANDARD
+ MIPS_INVAL("PMON / selsl");
+ generate_exception(ctx, EXCP_RI);
+#else
gen_op_pmon(sa);
+#endif
break;
case OPC_SYSCALL:
generate_exception(ctx, EXCP_SYSCALL);
@@ -4724,10 +4729,15 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
case OPC_BREAK:
generate_exception(ctx, EXCP_BREAK);
break;
- case OPC_SPIM: /* SPIM ? */
+ case OPC_SPIM:
+#ifdef MIPS_STRICT_STANDARD
+ MIPS_INVAL("SPIM");
+ generate_exception(ctx, EXCP_RI);
+#else
/* Implemented as RI exception for now. */
MIPS_INVAL("spim (unofficial)");
generate_exception(ctx, EXCP_RI);
+#endif
break;
case OPC_SYNC:
/* Treat as a noop. */