diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-21 11:04:42 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-21 11:04:42 +0000 |
| commit | 3953d7868768c179440e8302e536b436171205cc (patch) | |
| tree | a9b376ace49923e8735d31b1562696f432574713 /target-mips/translate.c | |
| parent | 1698b74161e9bbcf36c5075fe5b8357024c4b5bb (diff) | |
Move mips CPU specific initialization to translate_init.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index b39ec5f98a..89061db9aa 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -5292,8 +5292,6 @@ void cpu_reset (CPUMIPSState *env) env->CP0_Wired = 0; /* SMP not implemented */ env->CP0_EBase = 0x80000000; - env->CP0_Config2 = MIPS_CONFIG2; - env->CP0_Config3 = MIPS_CONFIG3; env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL); env->CP0_WatchLo = 0; env->hflags = MIPS_HFLAG_ERL; @@ -5305,7 +5303,6 @@ void cpu_reset (CPUMIPSState *env) env->hflags |= MIPS_HFLAG_UM; env->user_mode_only = 1; #endif - env->fcr0 = MIPS_FCR0; /* XXX some guesswork here, values are CPU specific */ env->SYNCI_Step = 16; env->CCRes = 2; |