diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-08-26 17:37:23 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-08-26 17:37:23 +0000 |
| commit | 3ddf0b5cde7c741258487710c40f7318fdcd0f18 (patch) | |
| tree | e106e525e0477c3559ae68c90d28406e7c9890dc /target-mips/translate.c | |
| parent | c92843b5dfc1e8f7baace9b7a4eac3e3231ac73e (diff) | |
Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 7f5141c33c..07dca14595 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -2225,6 +2225,8 @@ static void gen_mfc0 (CPUState *env, DisasContext *ctx, int reg, int sel) switch (sel) { case 0: #ifdef TARGET_MIPS64 + if (!(ctx->hflags & MIPS_HFLAG_64)) + goto die; gen_op_mfc0_xcontext(); rn = "XContext"; break; @@ -2781,6 +2783,8 @@ static void gen_mtc0 (CPUState *env, DisasContext *ctx, int reg, int sel) switch (sel) { case 0: #ifdef TARGET_MIPS64 + if (!(ctx->hflags & MIPS_HFLAG_64)) + goto die; gen_op_mtc0_xcontext(); rn = "XContext"; break; @@ -3331,11 +3335,9 @@ static void gen_dmfc0 (CPUState *env, DisasContext *ctx, int reg, int sel) case 20: switch (sel) { case 0: -#ifdef TARGET_MIPS64 gen_op_dmfc0_xcontext(); rn = "XContext"; break; -#endif default: goto die; } @@ -3878,11 +3880,9 @@ static void gen_dmtc0 (CPUState *env, DisasContext *ctx, int reg, int sel) case 20: switch (sel) { case 0: -#ifdef TARGET_MIPS64 gen_op_mtc0_xcontext(); rn = "XContext"; break; -#endif default: goto die; } @@ -4107,6 +4107,8 @@ static void gen_cp0 (CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int break; #ifdef TARGET_MIPS64 case OPC_DMFC0: + if (!(ctx->hflags & MIPS_HFLAG_64)) + generate_exception(ctx, EXCP_RI); if (rt == 0) { /* Treat as NOP */ return; @@ -4116,6 +4118,8 @@ static void gen_cp0 (CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int opn = "dmfc0"; break; case OPC_DMTC0: + if (!(ctx->hflags & MIPS_HFLAG_64)) + generate_exception(ctx, EXCP_RI); GEN_LOAD_REG_TN(T0, rt); gen_dmtc0(env,ctx, rd, ctx->opcode & 0x7); opn = "dmtc0"; @@ -6183,11 +6187,7 @@ void cpu_reset (CPUMIPSState *env) } else { env->CP0_ErrorEPC = env->PC; } -#ifdef TARGET_MIPS64 - env->hflags = MIPS_HFLAG_64; -#else env->hflags = 0; -#endif env->PC = (int32_t)0xBFC00000; env->CP0_Wired = 0; /* SMP not implemented */ |