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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-25 16:41:11 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-25 16:41:11 +0000 |
| commit | d6929309b689264755963fe5ee18767a7f1c4af5 (patch) | |
| tree | ab5a1683910598407dda5c58d1eab01e493b9199 /target-mips/translate.c | |
| parent | 7bc45061eee222bd198db8485e2e9364190ff8f1 (diff) | |
Next attempt to get the lui sign extension right.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 96a0f37d27..06581f2cc6 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -907,8 +907,7 @@ static void gen_arith_imm (DisasContext *ctx, uint32_t opc, int rt, GEN_LOAD_IMM_TN(T1, uimm); break; case OPC_LUI: - uimm = (int32_t)(imm << 16); - GEN_LOAD_IMM_TN(T0, uimm); + GEN_LOAD_IMM_TN(T0, uimm << 16); break; case OPC_SLL: case OPC_SRA: |