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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-07-02 14:58:51 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-07-02 14:58:51 +0000
commit6af0bf9c7c3ab9ddbf74a3bf34e067761eb43c3d (patch)
tree81d0ac2bbc2f0fdacfff7619c36ded224775c45f /target-mips/op_mem.c
parent6643d27ea00f3580fb0120219bd510f00b64bca5 (diff)
MIPS target (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1464 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/op_mem.c')
-rw-r--r--target-mips/op_mem.c113
1 files changed, 113 insertions, 0 deletions
diff --git a/target-mips/op_mem.c b/target-mips/op_mem.c
new file mode 100644
index 0000000000..bbb322db49
--- /dev/null
+++ b/target-mips/op_mem.c
@@ -0,0 +1,113 @@
+/*
+ * MIPS emulation memory micro-operations for qemu.
+ *
+ * Copyright (c) 2004-2005 Jocelyn Mayer
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/* Standard loads and stores */
+void glue(op_lb, MEMSUFFIX) (void)
+{
+ T0 = glue(ldsb, MEMSUFFIX)(T0);
+ RETURN();
+}
+
+void glue(op_lbu, MEMSUFFIX) (void)
+{
+ T0 = glue(ldub, MEMSUFFIX)(T0);
+ RETURN();
+}
+
+void glue(op_sb, MEMSUFFIX) (void)
+{
+ glue(stb, MEMSUFFIX)(T0, T1);
+ RETURN();
+}
+
+void glue(op_lh, MEMSUFFIX) (void)
+{
+ T0 = glue(ldsw, MEMSUFFIX)(T0);
+ RETURN();
+}
+
+void glue(op_lhu, MEMSUFFIX) (void)
+{
+ T0 = glue(lduw, MEMSUFFIX)(T0);
+ RETURN();
+}
+
+void glue(op_sh, MEMSUFFIX) (void)
+{
+ glue(stw, MEMSUFFIX)(T0, T1);
+ RETURN();
+}
+
+void glue(op_lw, MEMSUFFIX) (void)
+{
+ T0 = glue(ldl, MEMSUFFIX)(T0);
+ RETURN();
+}
+
+void glue(op_sw, MEMSUFFIX) (void)
+{
+ glue(stl, MEMSUFFIX)(T0, T1);
+ RETURN();
+}
+
+/* "half" load and stores */
+void glue(op_lwl, MEMSUFFIX) (void)
+{
+ CALL_FROM_TB0(glue(do_lwl, MEMSUFFIX));
+ RETURN();
+}
+
+void glue(op_lwr, MEMSUFFIX) (void)
+{
+ CALL_FROM_TB0(glue(do_lwr, MEMSUFFIX));
+ RETURN();
+}
+
+void glue(op_swl, MEMSUFFIX) (void)
+{
+ CALL_FROM_TB0(glue(do_swl, MEMSUFFIX));
+ RETURN();
+}
+
+void glue(op_swr, MEMSUFFIX) (void)
+{
+ CALL_FROM_TB0(glue(do_swr, MEMSUFFIX));
+ RETURN();
+}
+
+void glue(op_ll, MEMSUFFIX) (void)
+{
+ T1 = T0;
+ T0 = glue(ldl, MEMSUFFIX)(T0);
+ env->CP0_LLAddr = T1;
+ RETURN();
+}
+
+void glue(op_sc, MEMSUFFIX) (void)
+{
+ CALL_FROM_TB0(dump_sc);
+ if (T0 == env->CP0_LLAddr) {
+ glue(stl, MEMSUFFIX)(T0, T1);
+ T0 = 1;
+ } else {
+ T0 = 0;
+ }
+ RETURN();
+}