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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-27 10:03:42 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-27 10:03:42 +0000
commit2796188e563dcb2c1e8d75e02ca284bb9dc792e3 (patch)
tree6cd02528a24e9089c5a5ff06cb3a5c90aab65522 /target-mips/op_helper.c
parentb5dc7732e1cc2fb549e48b7b5d664f2c79628e2e (diff)
Avoid unused input arguments which triggered tcg errors. Spotted by
Stefan Weil. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4795 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/op_helper.c')
-rw-r--r--target-mips/op_helper.c34
1 files changed, 18 insertions, 16 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index fe3bbd4d29..6c1d048b71 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1746,18 +1746,20 @@ void r4k_do_tlbr (void)
#endif /* !CONFIG_USER_ONLY */
/* Specials */
-target_ulong do_di (target_ulong t0)
+target_ulong do_di (void)
{
- t0 = env->CP0_Status;
+ target_ulong t0 = env->CP0_Status;
+
env->CP0_Status = t0 & ~(1 << CP0St_IE);
cpu_mips_update_irq(env);
return t0;
}
-target_ulong do_ei (target_ulong t0)
+target_ulong do_ei (void)
{
- t0 = env->CP0_Status;
+ target_ulong t0 = env->CP0_Status;
+
env->CP0_Status = t0 | (1 << CP0St_IE);
cpu_mips_update_irq(env);
@@ -1820,48 +1822,48 @@ void do_deret (void)
env->CP0_LLAddr = 1;
}
-target_ulong do_rdhwr_cpunum(target_ulong t0)
+target_ulong do_rdhwr_cpunum(void)
{
if ((env->hflags & MIPS_HFLAG_CP0) ||
(env->CP0_HWREna & (1 << 0)))
- t0 = env->CP0_EBase & 0x3ff;
+ return env->CP0_EBase & 0x3ff;
else
do_raise_exception(EXCP_RI);
- return t0;
+ return 0;
}
-target_ulong do_rdhwr_synci_step(target_ulong t0)
+target_ulong do_rdhwr_synci_step(void)
{
if ((env->hflags & MIPS_HFLAG_CP0) ||
(env->CP0_HWREna & (1 << 1)))
- t0 = env->SYNCI_Step;
+ return env->SYNCI_Step;
else
do_raise_exception(EXCP_RI);
- return t0;
+ return 0;
}
-target_ulong do_rdhwr_cc(target_ulong t0)
+target_ulong do_rdhwr_cc(void)
{
if ((env->hflags & MIPS_HFLAG_CP0) ||
(env->CP0_HWREna & (1 << 2)))
- t0 = env->CP0_Count;
+ return env->CP0_Count;
else
do_raise_exception(EXCP_RI);
- return t0;
+ return 0;
}
-target_ulong do_rdhwr_ccres(target_ulong t0)
+target_ulong do_rdhwr_ccres(void)
{
if ((env->hflags & MIPS_HFLAG_CP0) ||
(env->CP0_HWREna & (1 << 3)))
- t0 = env->CCRes;
+ return env->CCRes;
else
do_raise_exception(EXCP_RI);
- return t0;
+ return 0;
}
/* Bitfield operations. */