diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-13 19:22:13 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-13 19:22:13 +0000 |
| commit | 100ce98812c2624a7e7922055d80ebbd81e8caa9 (patch) | |
| tree | 7f44bac550cbac7dcc5437450242789f447566c1 /target-mips/op_helper.c | |
| parent | f1b0aa5de7f48650aa6260d5dfb8ece1899e286c (diff) | |
Full MIPS64 MMU implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2820 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/op_helper.c')
| -rw-r--r-- | target-mips/op_helper.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 895ca7ff8f..2dd0f887b0 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -391,6 +391,9 @@ static void r4k_fill_tlb (int idx) /* XXX: detect conflicting TLBs and raise a MCHECK exception when needed */ tlb = &env->mmu.r4k.tlb[idx]; tlb->VPN = env->CP0_EntryHi & (TARGET_PAGE_MASK << 1); +#ifdef TARGET_MIPS64 + tlb->VPN &= 0xC00000FFFFFFFFFFULL; +#endif tlb->ASID = env->CP0_EntryHi & 0xFF; tlb->PageMask = env->CP0_PageMask; tlb->G = env->CP0_EntryLo0 & env->CP0_EntryLo1 & 1; |