diff options
author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-21 13:48:28 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-21 13:48:28 +0000 |
commit | 5dc4b744806b5f7487989e42a84322fbd5810877 (patch) | |
tree | 9694eb3eefb095920f55af4c92b7dd37e9482bb9 /target-mips/op.c | |
parent | c570fd169c16f110781f31e0e963542a15229ee9 (diff) |
Scrap SIGN_EXTEND32.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2251 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/op.c')
-rw-r--r-- | target-mips/op.c | 102 |
1 files changed, 51 insertions, 51 deletions
diff --git a/target-mips/op.c b/target-mips/op.c index 4b6c20c49c..27fb3ef59a 100644 --- a/target-mips/op.c +++ b/target-mips/op.c @@ -328,7 +328,7 @@ void op_store_LO (void) /* Arithmetic */ void op_add (void) { - T0 = SIGN_EXTEND32((int32_t)T0 + (int32_t)T1); + T0 = (int32_t)((int32_t)T0 + (int32_t)T1); RETURN(); } @@ -342,13 +342,13 @@ void op_addo (void) /* operands of same sign, result different sign */ CALL_FROM_TB1(do_raise_exception_direct, EXCP_OVERFLOW); } - T0 = SIGN_EXTEND32(T0); + T0 = (int32_t)T0; RETURN(); } void op_sub (void) { - T0 = SIGN_EXTEND32((int32_t)T0 - (int32_t)T1); + T0 = (int32_t)((int32_t)T0 - (int32_t)T1); RETURN(); } @@ -362,21 +362,21 @@ void op_subo (void) /* operands of different sign, first operand and result different sign */ CALL_FROM_TB1(do_raise_exception_direct, EXCP_OVERFLOW); } - T0 = SIGN_EXTEND32(T0); + T0 = (int32_t)T0; RETURN(); } void op_mul (void) { - T0 = SIGN_EXTEND32((int32_t)T0 * (int32_t)T1); + T0 = (int32_t)((int32_t)T0 * (int32_t)T1); RETURN(); } void op_div (void) { if (T1 != 0) { - env->LO = SIGN_EXTEND32((int32_t)T0 / (int32_t)T1); - env->HI = SIGN_EXTEND32((int32_t)T0 % (int32_t)T1); + env->LO = (int32_t)((int32_t)T0 / (int32_t)T1); + env->HI = (int32_t)((int32_t)T0 % (int32_t)T1); } RETURN(); } @@ -384,8 +384,8 @@ void op_div (void) void op_divu (void) { if (T1 != 0) { - env->LO = SIGN_EXTEND32((uint32_t)T0 / (uint32_t)T1); - env->HI = SIGN_EXTEND32((uint32_t)T0 % (uint32_t)T1); + env->LO = (int32_t)((uint32_t)T0 / (uint32_t)T1); + env->HI = (int32_t)((uint32_t)T0 % (uint32_t)T1); } RETURN(); } @@ -497,19 +497,19 @@ void op_xor (void) void op_sll (void) { - T0 = SIGN_EXTEND32((uint32_t)T0 << (uint32_t)T1); + T0 = (int32_t)((uint32_t)T0 << (uint32_t)T1); RETURN(); } void op_sra (void) { - T0 = SIGN_EXTEND32((int32_t)T0 >> (uint32_t)T1); + T0 = (int32_t)((int32_t)T0 >> (uint32_t)T1); RETURN(); } void op_srl (void) { - T0 = SIGN_EXTEND32((uint32_t)T0 >> (uint32_t)T1); + T0 = (int32_t)((uint32_t)T0 >> (uint32_t)T1); RETURN(); } @@ -518,8 +518,8 @@ void op_rotr (void) target_ulong tmp; if (T1) { - tmp = SIGN_EXTEND32((uint32_t)T0 << (0x20 - (uint32_t)T1)); - T0 = SIGN_EXTEND32((uint32_t)T0 >> (uint32_t)T1) | tmp; + tmp = (int32_t)((uint32_t)T0 << (0x20 - (uint32_t)T1)); + T0 = (int32_t)((uint32_t)T0 >> (uint32_t)T1) | tmp; } else T0 = T1; RETURN(); @@ -527,19 +527,19 @@ void op_rotr (void) void op_sllv (void) { - T0 = SIGN_EXTEND32((uint32_t)T1 << ((uint32_t)T0 & 0x1F)); + T0 = (int32_t)((uint32_t)T1 << ((uint32_t)T0 & 0x1F)); RETURN(); } void op_srav (void) { - T0 = SIGN_EXTEND32((int32_t)T1 >> (T0 & 0x1F)); + T0 = (int32_t)((int32_t)T1 >> (T0 & 0x1F)); RETURN(); } void op_srlv (void) { - T0 = SIGN_EXTEND32((uint32_t)T1 >> (T0 & 0x1F)); + T0 = (int32_t)((uint32_t)T1 >> (T0 & 0x1F)); RETURN(); } @@ -549,8 +549,8 @@ void op_rotrv (void) T0 &= 0x1F; if (T0) { - tmp = SIGN_EXTEND32((uint32_t)T1 << (0x20 - T0)); - T0 = SIGN_EXTEND32((uint32_t)T1 >> T0) | tmp; + tmp = (int32_t)((uint32_t)T1 << (0x20 - T0)); + T0 = (int32_t)((uint32_t)T1 >> T0) | tmp; } else T0 = T1; RETURN(); @@ -842,8 +842,8 @@ static inline uint64_t get_HILO (void) static inline void set_HILO (uint64_t HILO) { - env->LO = SIGN_EXTEND32(HILO & 0xFFFFFFFF); - env->HI = SIGN_EXTEND32(HILO >> 32); + env->LO = (int32_t)(HILO & 0xFFFFFFFF); + env->HI = (int32_t)(HILO >> 32); } void op_mult (void) @@ -1032,7 +1032,7 @@ void op_jnz_T2 (void) /* CP0 functions */ void op_mfc0_index (void) { - T0 = SIGN_EXTEND32(env->CP0_index); + T0 = (int32_t)(env->CP0_index); RETURN(); } @@ -1062,25 +1062,25 @@ void op_mfc0_context (void) void op_mfc0_pagemask (void) { - T0 = SIGN_EXTEND32(env->CP0_PageMask); + T0 = (int32_t)env->CP0_PageMask; RETURN(); } void op_mfc0_pagegrain (void) { - T0 = SIGN_EXTEND32(env->CP0_PageGrain); + T0 = (int32_t)env->CP0_PageGrain; RETURN(); } void op_mfc0_wired (void) { - T0 = SIGN_EXTEND32(env->CP0_Wired); + T0 = (int32_t)env->CP0_Wired; RETURN(); } void op_mfc0_hwrena (void) { - T0 = SIGN_EXTEND32(env->CP0_HWREna); + T0 = (int32_t)env->CP0_HWREna; RETURN(); } @@ -1104,13 +1104,13 @@ void op_mfc0_entryhi (void) void op_mfc0_compare (void) { - T0 = SIGN_EXTEND32(env->CP0_Compare); + T0 = (int32_t)env->CP0_Compare; RETURN(); } void op_mfc0_status (void) { - T0 = SIGN_EXTEND32(env->CP0_Status); + T0 = (int32_t)env->CP0_Status; if (env->hflags & MIPS_HFLAG_UM) T0 |= (1 << CP0St_UM); if (env->hflags & MIPS_HFLAG_ERL) @@ -1122,19 +1122,19 @@ void op_mfc0_status (void) void op_mfc0_intctl (void) { - T0 = SIGN_EXTEND32(env->CP0_IntCtl); + T0 = (int32_t)env->CP0_IntCtl; RETURN(); } void op_mfc0_srsctl (void) { - T0 = SIGN_EXTEND32(env->CP0_SRSCtl); + T0 = (int32_t)env->CP0_SRSCtl; RETURN(); } void op_mfc0_cause (void) { - T0 = SIGN_EXTEND32(env->CP0_Cause); + T0 = (int32_t)env->CP0_Cause; RETURN(); } @@ -1146,7 +1146,7 @@ void op_mfc0_epc (void) void op_mfc0_prid (void) { - T0 = SIGN_EXTEND32(env->CP0_PRid); + T0 = (int32_t)env->CP0_PRid; RETURN(); } @@ -1158,25 +1158,25 @@ void op_mfc0_ebase (void) void op_mfc0_config0 (void) { - T0 = SIGN_EXTEND32(env->CP0_Config0); + T0 = (int32_t)env->CP0_Config0; RETURN(); } void op_mfc0_config1 (void) { - T0 = SIGN_EXTEND32(env->CP0_Config1); + T0 = (int32_t)env->CP0_Config1; RETURN(); } void op_mfc0_config2 (void) { - T0 = SIGN_EXTEND32(env->CP0_Config2); + T0 = (int32_t)env->CP0_Config2; RETURN(); } void op_mfc0_config3 (void) { - T0 = SIGN_EXTEND32(env->CP0_Config3); + T0 = (int32_t)env->CP0_Config3; RETURN(); } @@ -1188,13 +1188,13 @@ void op_mfc0_lladdr (void) void op_mfc0_watchlo0 (void) { - T0 = SIGN_EXTEND32(env->CP0_WatchLo); + T0 = (int32_t)env->CP0_WatchLo; RETURN(); } void op_mfc0_watchhi0 (void) { - T0 = SIGN_EXTEND32(env->CP0_WatchHi); + T0 = (int32_t)env->CP0_WatchHi; RETURN(); } @@ -1212,7 +1212,7 @@ void op_mfc0_framemask (void) void op_mfc0_debug (void) { - T0 = SIGN_EXTEND32(env->CP0_Debug); + T0 = (int32_t)env->CP0_Debug; if (env->hflags & MIPS_HFLAG_DM) T0 |= 1 << CP0DB_DM; RETURN(); @@ -1226,31 +1226,31 @@ void op_mfc0_depc (void) void op_mfc0_performance0 (void) { - T0 = SIGN_EXTEND32(env->CP0_Performance0); + T0 = (int32_t)env->CP0_Performance0; RETURN(); } void op_mfc0_taglo (void) { - T0 = SIGN_EXTEND32(env->CP0_TagLo); + T0 = (int32_t)env->CP0_TagLo; RETURN(); } void op_mfc0_datalo (void) { - T0 = SIGN_EXTEND32(env->CP0_DataLo); + T0 = (int32_t)env->CP0_DataLo; RETURN(); } void op_mfc0_taghi (void) { - T0 = SIGN_EXTEND32(env->CP0_TagHi); + T0 = (int32_t)env->CP0_TagHi; RETURN(); } void op_mfc0_datahi (void) { - T0 = SIGN_EXTEND32(env->CP0_DataHi); + T0 = (int32_t)env->CP0_DataHi; RETURN(); } @@ -1262,7 +1262,7 @@ void op_mfc0_errorepc (void) void op_mfc0_desave (void) { - T0 = SIGN_EXTEND32(env->CP0_DESAVE); + T0 = (int32_t)env->CP0_DESAVE; RETURN(); } @@ -1276,7 +1276,7 @@ void op_mtc0_entrylo0 (void) { /* Large physaddr not implemented */ /* 1k pages not implemented */ - env->CP0_EntryLo0 = T0 & SIGN_EXTEND32(0x3FFFFFFFUL); + env->CP0_EntryLo0 = T0 & (int32_t)0x3FFFFFFF; RETURN(); } @@ -1284,7 +1284,7 @@ void op_mtc0_entrylo1 (void) { /* Large physaddr not implemented */ /* 1k pages not implemented */ - env->CP0_EntryLo1 = T0 & SIGN_EXTEND32(0x3FFFFFFFUL); + env->CP0_EntryLo1 = T0 & (int32_t)0x3FFFFFFF; RETURN(); } @@ -1334,7 +1334,7 @@ void op_mtc0_entryhi (void) /* 1k pages not implemented */ /* Ignore MIPS64 TLB for now */ - val = T0 & SIGN_EXTEND32(0xFFFFE0FF); + val = T0 & (int32_t)0xFFFFE0FF; old = env->CP0_EntryHi; env->CP0_EntryHi = val; /* If the ASID changes, flush qemu's TLB. */ @@ -1353,7 +1353,7 @@ void op_mtc0_status (void) { uint32_t val, old, mask; - val = T0 & SIGN_EXTEND32(0xFA78FF01); + val = T0 & (int32_t)0xFA78FF01; old = env->CP0_Status; if (T0 & (1 << CP0St_UM)) env->hflags |= MIPS_HFLAG_UM; @@ -1431,7 +1431,7 @@ void op_mtc0_ebase (void) { /* vectored interrupts not implemented */ /* Multi-CPU not implemented */ - env->CP0_EBase = SIGN_EXTEND32(0x80000000) | (T0 & 0x3FFFF000); + env->CP0_EBase = (int32_t)0x80000000 | (T0 & 0x3FFFF000); RETURN(); } @@ -1501,7 +1501,7 @@ void op_mtc0_performance0 (void) void op_mtc0_taglo (void) { - env->CP0_TagLo = T0 & SIGN_EXTEND32(0xFFFFFCF6); + env->CP0_TagLo = T0 & (int32_t)0xFFFFFCF6; RETURN(); } |