Switch bitfield instructions and assorted special ops to TCG.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4739 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 0 insertions, 150 deletions

diff --git a/target-mips/op.c b/target-mips/op.c
index 7d7c4732d7..254973f5a6 100644
--- a/target-mips/op.c
+++ b/target-mips/op.c
@@ -661,153 +661,3 @@ void op_bc1any4t (void)
     DEBUG_FPU_STATE();
     FORCE_RET();
 }
-
-/* Specials */
-void op_di (void)
-{
-    T0 = env->CP0_Status;
-    env->CP0_Status = T0 & ~(1 << CP0St_IE);
-    CALL_FROM_TB1(cpu_mips_update_irq, env);
-    FORCE_RET();
-}
-
-void op_ei (void)
-{
-    T0 = env->CP0_Status;
-    env->CP0_Status = T0 | (1 << CP0St_IE);
-    CALL_FROM_TB1(cpu_mips_update_irq, env);
-    FORCE_RET();
-}
-
-void debug_pre_eret (void);
-void debug_post_eret (void);
-void op_eret (void)
-{
-    if (loglevel & CPU_LOG_EXEC)
-        CALL_FROM_TB0(debug_pre_eret);
-    if (env->CP0_Status & (1 << CP0St_ERL)) {
-        env->PC[env->current_tc] = env->CP0_ErrorEPC;
-        env->CP0_Status &= ~(1 << CP0St_ERL);
-    } else {
-        env->PC[env->current_tc] = env->CP0_EPC;
-        env->CP0_Status &= ~(1 << CP0St_EXL);
-    }
-    CALL_FROM_TB1(compute_hflags, env);
-    if (loglevel & CPU_LOG_EXEC)
-        CALL_FROM_TB0(debug_post_eret);
-    env->CP0_LLAddr = 1;
-    FORCE_RET();
-}
-
-void op_deret (void)
-{
-    if (loglevel & CPU_LOG_EXEC)
-        CALL_FROM_TB0(debug_pre_eret);
-    env->PC[env->current_tc] = env->CP0_DEPC;
-    env->hflags &= MIPS_HFLAG_DM;
-    CALL_FROM_TB1(compute_hflags, env);
-    if (loglevel & CPU_LOG_EXEC)
-        CALL_FROM_TB0(debug_post_eret);
-    env->CP0_LLAddr = 1;
-    FORCE_RET();
-}
-
-void op_rdhwr_cpunum(void)
-{
-    if ((env->hflags & MIPS_HFLAG_CP0) ||
-        (env->CP0_HWREna & (1 << 0)))
-        T0 = env->CP0_EBase & 0x3ff;
-    else
-        CALL_FROM_TB1(do_raise_exception, EXCP_RI);
-    FORCE_RET();
-}
-
-void op_rdhwr_synci_step(void)
-{
-    if ((env->hflags & MIPS_HFLAG_CP0) ||
-        (env->CP0_HWREna & (1 << 1)))
-        T0 = env->SYNCI_Step;
-    else
-        CALL_FROM_TB1(do_raise_exception, EXCP_RI);
-    FORCE_RET();
-}
-
-void op_rdhwr_cc(void)
-{
-    if ((env->hflags & MIPS_HFLAG_CP0) ||
-        (env->CP0_HWREna & (1 << 2)))
-        T0 = env->CP0_Count;
-    else
-        CALL_FROM_TB1(do_raise_exception, EXCP_RI);
-    FORCE_RET();
-}
-
-void op_rdhwr_ccres(void)
-{
-    if ((env->hflags & MIPS_HFLAG_CP0) ||
-        (env->CP0_HWREna & (1 << 3)))
-        T0 = env->CCRes;
-    else
-        CALL_FROM_TB1(do_raise_exception, EXCP_RI);
-    FORCE_RET();
-}
-
-/* Bitfield operations. */
-void op_ext(void)
-{
-    unsigned int pos = PARAM1;
-    unsigned int size = PARAM2;
-
-    T0 = (int32_t)((T1 >> pos) & ((size < 32) ? ((1 << size) - 1) : ~0));
-    FORCE_RET();
-}
-
-void op_ins(void)
-{
-    unsigned int pos = PARAM1;
-    unsigned int size = PARAM2;
-    target_ulong mask = ((size < 32) ? ((1 << size) - 1) : ~0) << pos;
-
-    T0 = (int32_t)((T0 & ~mask) | ((T1 << pos) & mask));
-    FORCE_RET();
-}
-
-void op_wsbh(void)
-{
-    T0 = (int32_t)(((T1 << 8) & ~0x00FF00FF) | ((T1 >> 8) & 0x00FF00FF));
-    FORCE_RET();
-}
-
-#if defined(TARGET_MIPS64)
-void op_dext(void)
-{
-    unsigned int pos = PARAM1;
-    unsigned int size = PARAM2;
-
-    T0 = (T1 >> pos) & ((size < 64) ? ((1ULL << size) - 1) : ~0ULL);
-    FORCE_RET();
-}
-
-void op_dins(void)
-{
-    unsigned int pos = PARAM1;
-    unsigned int size = PARAM2;
-    target_ulong mask = ((size < 64) ? ((1ULL << size) - 1) : ~0ULL) << pos;
-
-    T0 = (T0 & ~mask) | ((T1 << pos) & mask);
-    FORCE_RET();
-}
-
-void op_dsbh(void)
-{
-    T0 = ((T1 << 8) & ~0x00FF00FF00FF00FFULL) | ((T1 >> 8) & 0x00FF00FF00FF00FFULL);
-    FORCE_RET();
-}
-
-void op_dshd(void)
-{
-    T1 = ((T1 << 16) & ~0x0000FFFF0000FFFFULL) | ((T1 >> 16) & 0x0000FFFF0000FFFFULL);
-    T0 = (T1 << 32) | (T1 >> 32);
-    FORCE_RET();
-}
-#endif