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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-25 17:34:33 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-25 17:34:33 +0000 |
commit | 996ba2ccf59891a8abe188c073eab3bae1c93b90 (patch) | |
tree | 92b839e42bbdaf9e97ece345608d2e5a5f2efc75 /target-mips/op.c | |
parent | e04ea3dc1a6997aa0d2eb8b21170b81f9151d37d (diff) |
MIPS64 improvements, based on a patch by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3021 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/op.c')
-rw-r--r-- | target-mips/op.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/op.c b/target-mips/op.c index 715c355046..4aa63e3463 100644 --- a/target-mips/op.c +++ b/target-mips/op.c @@ -297,7 +297,7 @@ void op_addr_add (void) with Status_UX = 0 should be casted to 32-bit and sign extended. See the MIPS64 PRA manual, section 4.10. */ #ifdef TARGET_MIPS64 - if ((env->CP0_Status & (1 << CP0St_UM)) && + if ((env->hflags & MIPS_HFLAG_UM) && !(env->CP0_Status & (1 << CP0St_UX))) T0 = (int64_t)(int32_t)(T0 + T1); else @@ -1608,7 +1608,7 @@ void op_dmfc0_errorepc (void) void op_cp0_enabled(void) { if (!(env->CP0_Status & (1 << CP0St_CU0)) && - (env->hflags & MIPS_HFLAG_UM)) { + (env->hflags & MIPS_HFLAG_UM)) { CALL_FROM_TB2(do_raise_exception_err, EXCP_CpU, 0); } RETURN(); |