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authorPaul Burton <paul.burton@imgtec.com>2016-06-27 16:19:10 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2016-07-12 09:10:19 +0100
commit2d72e7b047d800c9f99262466f65a98684ecca14 (patch)
tree83f051701fadbd4214f0e23e46881df03c8dddc5 /target-mips/machine.c
parent6ec98bd7b64ad75870c8e9d87a90fcd1a64b4942 (diff)
target-mips: change ASID type to hold more than 8 bits
ASID currently has uint8_t type which is too small since some processors support more than 8 bits ASID. Therefore change its type to uint16_t. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/machine.c')
-rw-r--r--target-mips/machine.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/target-mips/machine.c b/target-mips/machine.c
index 7314cfe8c7..a27f2f156d 100644
--- a/target-mips/machine.c
+++ b/target-mips/machine.c
@@ -132,7 +132,7 @@ static int get_tlb(QEMUFile *f, void *pv, size_t size)
qemu_get_betls(f, &v->VPN);
qemu_get_be32s(f, &v->PageMask);
- qemu_get_8s(f, &v->ASID);
+ qemu_get_be16s(f, &v->ASID);
qemu_get_be16s(f, &flags);
v->G = (flags >> 10) & 1;
v->C0 = (flags >> 7) & 3;
@@ -156,7 +156,7 @@ static void put_tlb(QEMUFile *f, void *pv, size_t size)
{
r4k_tlb_t *v = pv;
- uint8_t asid = v->ASID;
+ uint16_t asid = v->ASID;
uint16_t flags = ((v->EHINV << 15) |
(v->RI1 << 14) |
(v->RI0 << 13) |
@@ -172,7 +172,7 @@ static void put_tlb(QEMUFile *f, void *pv, size_t size)
qemu_put_betls(f, &v->VPN);
qemu_put_be32s(f, &v->PageMask);
- qemu_put_8s(f, &asid);
+ qemu_put_be16s(f, &asid);
qemu_put_be16s(f, &flags);
qemu_put_be64s(f, &v->PFN[0]);
qemu_put_be64s(f, &v->PFN[1]);
@@ -192,8 +192,8 @@ const VMStateInfo vmstate_info_tlb = {
const VMStateDescription vmstate_tlb = {
.name = "cpu/tlb",
- .version_id = 1,
- .minimum_version_id = 1,
+ .version_id = 2,
+ .minimum_version_id = 2,
.fields = (VMStateField[]) {
VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),