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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-05-22 22:14:43 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-05-22 22:14:43 +0000
commitba9a74dae0bb696ceab1ee2291cee43ef241a639 (patch)
treed07257af8d0dfc30f0376b2cec0538187aaf6f13 /target-mips/helper.c
parent3d9fb9fefe3f4e209b57443bed18691a2c6f3e7a (diff)
fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1937 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/helper.c')
-rw-r--r--target-mips/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 014f35d2d6..8b60b2ce9f 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -231,7 +231,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
env->CP0_Context = (env->CP0_Context & 0xff800000) |
((address >> 9) & 0x007ffff0);
env->CP0_EntryHi =
- (env->CP0_EntryHi & 0xFF) | (address & 0xFFFFF000);
+ (env->CP0_EntryHi & 0xFF) | (address & 0xFFFFE000);
env->exception_index = exception;
env->error_code = error_code;
ret = 1;