diff options
| author | Paul Brook <paul@codesourcery.com> | 2010-03-17 02:14:28 +0000 |
|---|---|---|
| committer | Paul Brook <paul@codesourcery.com> | 2010-03-17 02:44:41 +0000 |
| commit | d4c430a80f000d722bb70287af4d4c184a8d7006 (patch) | |
| tree | 9b9d059b2158f25fc0629fddcef192e3d791b187 /target-mips/helper.c | |
| parent | 409dbce54b57b85bd229174da86d77ca08508508 (diff) | |
Large page TLB flush
QEMU uses a fixed page size for the CPU TLB. If the guest uses large
pages then we effectively split these into multiple smaller pages, and
populate the corresponding TLB entries on demand.
When the guest invalidates the TLB by virtual address we must invalidate
all entries covered by the large page. However the address used to
invalidate the entry may not be present in the QEMU TLB, so we do not
know which regions to clear.
Implementing a full vaiable size TLB is hard and slow, so just keep a
simple address/mask pair to record which addresses may have been mapped by
large pages. If the guest invalidates this region then flush the
whole TLB.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Diffstat (limited to 'target-mips/helper.c')
| -rw-r--r-- | target-mips/helper.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c index 933c7bc1df..8102f03c26 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -296,9 +296,10 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, qemu_log("%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_plx " prot %d\n", __func__, address, ret, physical, prot); if (ret == TLBRET_MATCH) { - ret = tlb_set_page(env, address & TARGET_PAGE_MASK, - physical & TARGET_PAGE_MASK, prot, - mmu_idx, is_softmmu); + tlb_set_page(env, address & TARGET_PAGE_MASK, + physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, + mmu_idx, TARGET_PAGE_SIZE); + ret = 0; } else if (ret < 0) #endif { |