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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-23 18:04:12 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-23 18:04:12 +0000 |
commit | e034e2c39aee1800101812045690e0575abb428b (patch) | |
tree | d549ba6b2d7b25cf83ab2995b9cee9266fc80f96 /target-mips/cpu.h | |
parent | 5c40d2bd4836636b762906bf1516c30b0ed5d74c (diff) |
Handle MIPS64 SEGBITS value correctly.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r-- | target-mips/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 7650be48c0..f5f35e1223 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -102,6 +102,8 @@ struct CPUMIPSState { uint32_t nb_tlb; uint32_t tlb_in_use; + uint32_t SEGBITS; + target_ulong SEGMask; int (*map_address) (CPUMIPSState *env, target_ulong *physical, int *prot, target_ulong address, int rw, int access_type); void (*do_tlbwi) (void); void (*do_tlbwr) (void); |