diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-11 10:39:48 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-11 10:39:48 +0000 |
| commit | 764dfc3fa03f08457bb584720650c8899df82d57 (patch) | |
| tree | 1bf52b6f7cf0af72b0faec79bb93993086bc5c2c /target-mips/cpu.h | |
| parent | ae45d3693b49de05b472c00fbe0d6e3ff5d16ecc (diff) | |
Move FP TNs to cpu env.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4728 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 964a560fa3..874ecee5ee 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -70,11 +70,6 @@ typedef struct CPUMIPSFPUContext CPUMIPSFPUContext; struct CPUMIPSFPUContext { /* Floating point registers */ fpr_t fpr[32]; -#ifndef USE_HOST_FLOAT_REGS - fpr_t ft0; - fpr_t ft1; - fpr_t ft2; -#endif float_status fp_status; /* fpu implementation/revision register (fir) */ uint32_t fcr0; @@ -149,6 +144,12 @@ struct CPUMIPSState { target_ulong t0; target_ulong t1; #endif + /* temporary hack for FP globals */ +#ifndef USE_HOST_FLOAT_REGS + fpr_t ft0; + fpr_t ft1; + fpr_t ft2; +#endif target_ulong HI[MIPS_TC_MAX][MIPS_DSP_ACC]; target_ulong LO[MIPS_TC_MAX][MIPS_DSP_ACC]; target_ulong ACX[MIPS_TC_MAX][MIPS_DSP_ACC]; |