diff options
| author | Leon Alrae <leon.alrae@imgtec.com> | 2015-09-14 13:58:24 +0100 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2015-10-29 16:16:44 +0000 |
| commit | 7540a43a1d9de71fa7a53ccd2bb24a04e2aace41 (patch) | |
| tree | 50ea3690a02c798f87e8fb10cf6f2d5d8e91131c /target-mips/cpu.c | |
| parent | 71ca034a0dee69f77c8ac6ea7d21e5b6a0b0d836 (diff) | |
target-mips: implement the CPU wake-up on non-enabled interrupts in R6
In Release 6, the behaviour of WAIT has been modified to make it a
requirement that a processor that has disabled operation as a result of
executing a WAIT will resume operation on arrival of an interrupt even if
interrupts are not enabled.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/cpu.c')
| -rw-r--r-- | target-mips/cpu.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c index bbfee4509f..639a24b362 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -53,12 +53,13 @@ static bool mips_cpu_has_work(CPUState *cs) CPUMIPSState *env = &cpu->env; bool has_work = false; - /* It is implementation dependent if non-enabled interrupts - wake-up the CPU, however most of the implementations only + /* Prior to MIPS Release 6 it is implementation dependent if non-enabled + interrupts wake-up the CPU, however most of the implementations only check for interrupts that can be taken. */ if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { - if (cpu_mips_hw_interrupts_enabled(env)) { + if (cpu_mips_hw_interrupts_enabled(env) || + (env->insn_flags & ISA_MIPS32R6)) { has_work = true; } } |