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| author | Andreas Färber <afaerber@suse.de> | 2013-01-16 03:48:37 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-02-16 14:50:57 +0100 |
| commit | c1caf1d961288e41c25de6631c6751ae7baa20f0 (patch) | |
| tree | 282ab0ab9836b6b8abf8bd4db576be18159dc93d /target-mips/cpu.c | |
| parent | 746b03b27cac48be5a376d8635ffaf568339ebd7 (diff) | |
target-mips: Introduce QOM realizefn for MIPSCPU
Introduce a realizefn and set realized = true from cpu_mips_init().
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips/cpu.c')
| -rw-r--r-- | target-mips/cpu.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 10ff46d6a7..18895da80e 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -42,6 +42,17 @@ static void mips_cpu_reset(CPUState *s) cpu_state_reset(env); } +static void mips_cpu_realizefn(DeviceState *dev, Error **errp) +{ + MIPSCPU *cpu = MIPS_CPU(dev); + MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); + + cpu_reset(CPU(cpu)); + qemu_init_vcpu(&cpu->env); + + mcc->parent_realize(dev, errp); +} + static void mips_cpu_initfn(Object *obj) { MIPSCPU *cpu = MIPS_CPU(obj); @@ -54,6 +65,10 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); CPUClass *cc = CPU_CLASS(c); + DeviceClass *dc = DEVICE_CLASS(c); + + mcc->parent_realize = dc->realize; + dc->realize = mips_cpu_realizefn; mcc->parent_reset = cc->reset; cc->reset = mips_cpu_reset; |