aboutsummaryrefslogtreecommitdiff
path: root/target-microblaze
diff options
context:
space:
mode:
authorDong Xu Wang <wdongxu@linux.vnet.ibm.com>2011-11-22 18:06:21 +0800
committerStefan Hajnoczi <stefanha@linux.vnet.ibm.com>2011-12-02 10:50:57 +0000
commit4abf79a428bd1db681d6f4b5e521aa78cf913322 (patch)
tree4ed141534a6b899c851f0388b05c0d26dff35568 /target-microblaze
parent68dfbcd4d556056c904a6bda14b59242ba22e6cf (diff)
fix spelling in target sub directory
Cc: Richard Henderson <rth@twiddle.net> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Diffstat (limited to 'target-microblaze')
-rw-r--r--target-microblaze/cpu.h2
-rw-r--r--target-microblaze/translate.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 35302863cb..1a307e312d 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -243,7 +243,7 @@ typedef struct CPUMBState {
#define DRTE_FLAG (1 << 17)
#define DRTB_FLAG (1 << 18)
#define D_FLAG (1 << 19) /* Bit in ESR. */
-/* TB dependant CPUState. */
+/* TB dependent CPUState. */
#define IFLAGS_TB_MASK (D_FLAG | IMM_FLAG | DRTI_FLAG | DRTE_FLAG | DRTB_FLAG)
uint32_t iflags;
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 366fd3e607..d7f513d34d 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -120,7 +120,7 @@ static inline int sign_extend(unsigned int val, unsigned int width)
static inline void t_sync_flags(DisasContext *dc)
{
- /* Synch the tb dependant flags between translator and runtime. */
+ /* Synch the tb dependent flags between translator and runtime. */
if (dc->tb_flags != dc->synced_flags) {
tcg_gen_movi_tl(env_iflags, dc->tb_flags);
dc->synced_flags = dc->tb_flags;
@@ -1122,7 +1122,7 @@ static void dec_store(DisasContext *dc)
if ((dc->env->pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) {
tcg_gen_movi_tl(cpu_SR[SR_PC], dc->pc);
/* FIXME: if the alignment is wrong, we should restore the value
- * in memory. One possible way to acheive this is to probe
+ * in memory. One possible way to achieve this is to probe
* the MMU prior to the memaccess, thay way we could put
* the alignment checks in between the probe and the mem
* access.