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authorAurelien Jarno <aurelien@aurel32.net>2012-01-07 15:20:12 +0100
committerAurelien Jarno <aurelien@aurel32.net>2012-01-11 09:55:28 +0100
commit2355c16e74ffa4d14e7fc2b4a23b055565ac0221 (patch)
tree32637ade5cf6b3e8aa6a4a1d28629f6e607ea295 /target-microblaze/op_helper.c
parent170d5b4bb9f8382bd98dde09d969d2e85d83db06 (diff)
target-i386: fix SSE rounding and flush to zero
SSE rounding and flush to zero control has never been implemented. However given that softfloat-native was using a single state for FPU and SSE and given that glibc is setting both FPU and SSE state in fesetround(), this was working correctly up to the switch to softfloat. Fix that by adding an update_sse_status() function similar to update_fpu_status(), and callin git on write to mxcsr. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-microblaze/op_helper.c')
0 files changed, 0 insertions, 0 deletions