diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-08-17 17:34:10 +1000 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-09-11 08:15:28 -0700 |
| commit | 97ed5ccdee95f0b98bedc601ff979e368583472c (patch) | |
| tree | 5ee711528010f3700f13983b8222c2ca7ae85c83 /target-microblaze/cpu.h | |
| parent | ba9cef7b6e487a5a8969db81d09b8eec8a2b50c6 (diff) | |
tlb: Add "ifetch" argument to cpu_mmu_index()
This is set to true when the index is for an instruction fetch
translation.
The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS
acessors.
All targets ignore it for now, and all other callers pass "false".
This will allow targets who wish to split the mmu index between
instruction and data accesses to do so. A subsequent patch will
do just that for PowerPC.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-microblaze/cpu.h')
| -rw-r--r-- | target-microblaze/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index 7e20e59b89..402124a051 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -309,7 +309,7 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo, #define MMU_USER_IDX 2 /* See NB_MMU_MODES further up the file. */ -static inline int cpu_mmu_index (CPUMBState *env) +static inline int cpu_mmu_index (CPUMBState *env, bool ifetch) { /* Are we in nommu mode?. */ if (!(env->sregs[SR_MSR] & MSR_VM)) |