diff options
| author | Alistair Francis <alistair.francis@xilinx.com> | 2015-06-18 21:16:32 -0700 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2015-06-21 17:20:15 +1000 |
| commit | a6c3ed24748f06742413e174167b0faa7030c244 (patch) | |
| tree | 4e1d4e5f92349ce38feb1d10c4b327e7a6f419f0 /target-microblaze/cpu.c | |
| parent | 714461237083c1eadcb9d686f8ce4088737c1d0a (diff) | |
target-microblaze: Convert dcache-writeback to a CPU property
Originally the dcache-writeback PVR bits were manually set for each machine.
This is a hassle and difficult to read, instead set them based on the CPU
properties.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-microblaze/cpu.c')
| -rw-r--r-- | target-microblaze/cpu.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index c4cd68ab79..92c51a043e 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -119,6 +119,9 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) | (cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0); + env->pvr.regs[5] |= cpu->cfg.dcache_writeback ? + PVR5_DCACHE_WRITEBACK_MASK : 0; + env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); @@ -169,6 +172,8 @@ static Property mb_properties[] = { */ DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2), DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true), + DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback, + false), DEFINE_PROP_END_OF_LIST(), }; |