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authorAndreas Färber <afaerber@suse.de>2012-05-09 19:26:57 +0200
committerAnthony Liguori <aliguori@us.ibm.com>2012-05-09 13:59:19 -0500
commitd831fdb0517118e8029316495cb272cbb8910800 (patch)
treebe7016c385a5f9e06add22e9a607b5c4966372ac /target-m68k
parentc1696d94c17b7fe03a2b103b1ba117fb0726a316 (diff)
tcg/ppc: Don't hardcode register numbers
Also assure i64 alignment where necessary. Alignment code optimization suggested by malc. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-m68k')
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