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| author | Laurent Vivier <laurent@vivier.eu> | 2015-08-09 01:23:35 +0200 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2016-10-25 20:54:47 +0200 |
| commit | bcc098b0c23b4dd902ff56987d769bd839677331 (patch) | |
| tree | ae00161567e92309d9e19000db4dfb5f22f9b3bd /target-m68k/translate.c | |
| parent | 2b04e85a3401e13cb19b1de197e6c211eaadca4c (diff) | |
target-m68k: REG() macro cleanup
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-m68k/translate.c')
| -rw-r--r-- | target-m68k/translate.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 639db766ee..50c55a42c4 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -59,9 +59,10 @@ static TCGv cpu_aregs[8]; static TCGv_i64 cpu_fregs[8]; static TCGv_i64 cpu_macc[4]; -#define DREG(insn, pos) cpu_dregs[((insn) >> (pos)) & 7] -#define AREG(insn, pos) cpu_aregs[((insn) >> (pos)) & 7] -#define FREG(insn, pos) cpu_fregs[((insn) >> (pos)) & 7] +#define REG(insn, pos) (((insn) >> (pos)) & 7) +#define DREG(insn, pos) cpu_dregs[REG(insn, pos)] +#define AREG(insn, pos) cpu_aregs[REG(insn, pos)] +#define FREG(insn, pos) cpu_fregs[REG(insn, pos)] #define MACREG(acc) cpu_macc[acc] #define QREG_SP cpu_aregs[7] |