diff options
| author | Laurent Vivier <laurent@vivier.eu> | 2016-01-12 20:44:21 +0100 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2016-10-28 10:38:48 +0200 |
| commit | c630e436c0ed3adc3a858c328119daf6d1b3357f (patch) | |
| tree | 0d5c9fce18ea74c1e5855471b47d05c816d87e21 /target-m68k/translate.c | |
| parent | 71600eda7cc48f03ea306bc69ed7e52ef1d9dd91 (diff) | |
target-m68k: add linkl
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-m68k/translate.c')
| -rw-r--r-- | target-m68k/translate.c | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/target-m68k/translate.c b/target-m68k/translate.c index a128b67287..0d3111d353 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1733,21 +1733,36 @@ DISAS_INSN(mull) gen_logic_cc(s, dest, OS_LONG); } -DISAS_INSN(link) +static void gen_link(DisasContext *s, uint16_t insn, int32_t offset) { - int16_t offset; TCGv reg; TCGv tmp; - offset = cpu_ldsw_code(env, s->pc); - s->pc += 2; reg = AREG(insn, 0); tmp = tcg_temp_new(); tcg_gen_subi_i32(tmp, QREG_SP, 4); gen_store(s, OS_LONG, tmp, reg); - if ((insn & 7) != 7) + if ((insn & 7) != 7) { tcg_gen_mov_i32(reg, tmp); + } tcg_gen_addi_i32(QREG_SP, tmp, offset); + tcg_temp_free(tmp); +} + +DISAS_INSN(link) +{ + int16_t offset; + + offset = read_im16(env, s); + gen_link(s, insn, offset); +} + +DISAS_INSN(linkl) +{ + int32_t offset; + + offset = read_im32(env, s); + gen_link(s, insn, offset); } DISAS_INSN(unlk) @@ -3059,6 +3074,7 @@ void register_m68k_insns (CPUM68KState *env) INSN(not, 4600, ff00, M68000); INSN(undef, 46c0, ffc0, M68000); INSN(move_to_sr, 46c0, ffc0, CF_ISA_A); + INSN(linkl, 4808, fff8, M68000); BASE(pea, 4840, ffc0); BASE(swap, 4840, fff8); INSN(bkpt, 4848, fff8, BKPT); |