diff options
| author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-03 12:35:08 +0000 |
|---|---|---|
| committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-03 12:35:08 +0000 |
| commit | d315c8886b72b6ff8abfd43471449ac59da1f35a (patch) | |
| tree | add5a35f8d1de0a2b068dddc39cee194947dfdbc /target-m68k/cpu.h | |
| parent | 20dcee9483361ee0621cf6d68d271ecde686fd9c (diff) | |
Improve ColdFire CPU selection.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2925 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-m68k/cpu.h')
| -rw-r--r-- | target-m68k/cpu.h | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index 6f29d5e5c4..2d43354e27 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -184,14 +184,20 @@ void m68k_switch_sp(CPUM68KState *env); void do_m68k_semihosting(CPUM68KState *env, int nr); +/* There are 4 ColdFire core ISA revisions: A, A+, B and C. + Each feature covers the subset of instructions common to the + ISA revisions mentioned. */ + enum m68k_features { M68K_FEATURE_CF_ISA_A, - M68K_FEATURE_CF_ISA_B, - M68K_FEATURE_CF_ISA_C, + M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */ + M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */ + M68K_FEATURE_BRAL, /* Long unconditional branch. (ISA A+ or B). */ M68K_FEATURE_CF_FPU, M68K_FEATURE_CF_MAC, M68K_FEATURE_CF_EMAC, - M68K_FEATURE_USP, + M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */ + M68K_FEATURE_USP, /* User Stack Pointer. (ISA A+, B or C). */ M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */ M68K_FEATURE_WORD_INDEX /* word sized address index registers. */ }; |