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authorMichael Walle <michael@walle.cc>2016-10-13 00:35:08 +0200
committerMichael Tokarev <mjt@tls.msk.ru>2016-10-28 18:17:23 +0300
commit0a04e11f32cb51d3210007d902e170cc164bb813 (patch)
treed938ca1b07e3166662a77347180a5c5e52717748 /target-lm32
parent237a8650d640adfb00b65358891fed0e84edfd09 (diff)
target-lm32: rewrite gen_compare()
Drop the rX, rY and rZ stuff and use dc->r{0,1,2} directly. This should also fix the false positive in coverity CID 1005720. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target-lm32')
-rw-r--r--target-lm32/translate.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 792637f523..842af63a98 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -344,9 +344,6 @@ static void dec_calli(DisasContext *dc)
static inline void gen_compare(DisasContext *dc, int cond)
{
- int rX = (dc->format == OP_FMT_RR) ? dc->r2 : dc->r1;
- int rY = dc->r0;
- int rZ = (dc->format == OP_FMT_RR) ? dc->r1 : -1;
int i;
if (dc->format == OP_FMT_RI) {
@@ -360,9 +357,9 @@ static inline void gen_compare(DisasContext *dc, int cond)
break;
}
- tcg_gen_setcondi_tl(cond, cpu_R[rX], cpu_R[rY], i);
+ tcg_gen_setcondi_tl(cond, cpu_R[dc->r1], cpu_R[dc->r0], i);
} else {
- tcg_gen_setcond_tl(cond, cpu_R[rX], cpu_R[rY], cpu_R[rZ]);
+ tcg_gen_setcond_tl(cond, cpu_R[dc->r2], cpu_R[dc->r0], cpu_R[dc->r1]);
}
}