Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging

QOM CPUState refactorings

* Fix NULL pointer dereference in gdbstub
* Introduce vaddr type
* Introduce CPUClass::set_pc()
* Introduce CPUClass::synchronize_from_tb()
* Introduce CPUClass::get_phys_page_debug()
* Introduce CPUClass::memory_rw_debug()
* Move singlestep_enabled and gdb_regs fields out of CPU_COMMON
* Adopt CPUState in more APIs
* Propagate CPUState in gdbstub

# gpg: Signature made Mon 22 Jul 2013 07:50:17 PM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

# By Andreas Färber (21) and others
# Via Andreas Färber
* afaerber/tags/qom-cpu-for-anthony: (24 commits)
  linux-user: Use X86CPU property to retrieve CPUID family
  gdbstub: Change gdb_register_coprocessor() argument to CPUState
  cpu: Move gdb_regs field from CPU_COMMON to CPUState
  gdbstub: Change GDBState::{c,g}_cpu and find_cpu() to CPUState
  cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug()
  exec: Change cpu_memory_rw_debug() argument to CPUState
  cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
  gdbstub: Change gdb_{read,write}_register() argument to CPUState
  gdbstub: Change gdb_handlesig() argument to CPUState
  gdbstub: Change syscall callback argument to CPUState
  kvm: Change kvm_{insert,remove}_breakpoint() argument to CPUState
  cpu: Change cpu_single_step() argument to CPUState
  gdbstub: Update gdb_handlesig() and gdb_signalled() Coding Style
  cpu: Move singlestep_enabled field from CPU_COMMON to CPUState
  target-alpha: Copy implver to DisasContext
  target-alpha: Copy singlestep_enabled to DisasContext
  cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()
  target-unicore32: Implement CPUClass::set_pc()
  target-moxie: Implement CPUClass::set_pc()
  target-m68k: Implement CPUClass::set_pc()
  ...

1 files changed, 4 insertions, 3 deletions

diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index ed12f50740..1247287050 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1015,6 +1015,7 @@ static inline
 void gen_intermediate_code_internal(LM32CPU *cpu,
                                     TranslationBlock *tb, bool search_pc)
 {
+    CPUState *cs = CPU(cpu);
     CPULM32State *env = &cpu->env;
     struct DisasContext ctx, *dc = &ctx;
     uint16_t *gen_opc_end;
@@ -1032,7 +1033,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
 
     dc->is_jmp = DISAS_NEXT;
     dc->pc = pc_start;
-    dc->singlestep_enabled = env->singlestep_enabled;
+    dc->singlestep_enabled = cs->singlestep_enabled;
     dc->nr_nops = 0;
 
     if (pc_start & 3) {
@@ -1077,7 +1078,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
 
     } while (!dc->is_jmp
          && tcg_ctx.gen_opc_ptr < gen_opc_end
-         && !env->singlestep_enabled
+         && !cs->singlestep_enabled
          && !singlestep
          && (dc->pc < next_page_start)
          && num_insns < max_insns);
@@ -1086,7 +1087,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
         gen_io_end();
     }
 
-    if (unlikely(env->singlestep_enabled)) {
+    if (unlikely(cs->singlestep_enabled)) {
         if (dc->is_jmp == DISAS_NEXT) {
             tcg_gen_movi_tl(cpu_pc, dc->pc);
         }