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authorMichael Walle <michael@walle.cc>2012-12-14 18:14:04 +0100
committerMichael Walle <michael@walle.cc>2013-03-18 19:40:34 +0100
commitdf5eb7d2c871ccd708e0f45cdc5d79b73550731b (patch)
tree538e9749a71d25876350c72f2146a8bc4b1c5778 /target-lm32/translate.c
parent6036e9d87e73c511fef48a3c06267f92e613fca9 (diff)
target-lm32: fix cmpgui and cmpgeui opcodes
For unsigned compares the immediate has to be zero extended. Signed-off-by: Michael Walle <michael@walle.cc>
Diffstat (limited to 'target-lm32/translate.c')
-rw-r--r--target-lm32/translate.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index f51ffc5e87..e885bb3aeb 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -324,10 +324,20 @@ static inline void gen_compare(DisasContext *dc, int cond)
int rX = (dc->format == OP_FMT_RR) ? dc->r2 : dc->r1;
int rY = (dc->format == OP_FMT_RR) ? dc->r0 : dc->r0;
int rZ = (dc->format == OP_FMT_RR) ? dc->r1 : -1;
+ int i;
if (dc->format == OP_FMT_RI) {
- tcg_gen_setcondi_tl(cond, cpu_R[rX], cpu_R[rY],
- sign_extend(dc->imm16, 16));
+ switch (cond) {
+ case TCG_COND_GEU:
+ case TCG_COND_GTU:
+ i = zero_extend(dc->imm16, 16);
+ break;
+ default:
+ i = sign_extend(dc->imm16, 16);
+ break;
+ }
+
+ tcg_gen_setcondi_tl(cond, cpu_R[rX], cpu_R[rY], i);
} else {
tcg_gen_setcond_tl(cond, cpu_R[rX], cpu_R[rY], cpu_R[rZ]);
}
@@ -373,7 +383,7 @@ static void dec_cmpgeu(DisasContext *dc)
{
if (dc->format == OP_FMT_RI) {
LOG_DIS("cmpgeui r%d, r%d, %d\n", dc->r0, dc->r1,
- sign_extend(dc->imm16, 16));
+ zero_extend(dc->imm16, 16));
} else {
LOG_DIS("cmpgeu r%d, r%d, r%d\n", dc->r2, dc->r0, dc->r1);
}
@@ -385,7 +395,7 @@ static void dec_cmpgu(DisasContext *dc)
{
if (dc->format == OP_FMT_RI) {
LOG_DIS("cmpgui r%d, r%d, %d\n", dc->r0, dc->r1,
- sign_extend(dc->imm16, 16));
+ zero_extend(dc->imm16, 16));
} else {
LOG_DIS("cmpgu r%d, r%d, r%d\n", dc->r2, dc->r0, dc->r1);
}