diff options
author | Aurelien Jarno <aurelien@aurel32.net> | 2013-03-26 19:56:02 +0100 |
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committer | Aurelien Jarno <aurelien@aurel32.net> | 2013-04-01 18:49:16 +0200 |
commit | 83f7dc28ca7cb422f88caf3923bf078abb4e4dea (patch) | |
tree | 8d1f27e885a4f915c2b805bf407e50f9497fb660 /target-i386 | |
parent | e4eba27e29114842978234a44c92b2a945a6b46d (diff) |
target-i386: enable SSE4.1 and SSE4.2 in TCG mode
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-i386')
-rw-r--r-- | target-i386/cpu.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c index a0640db9e3..4b43759ec5 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -388,16 +388,17 @@ typedef struct x86_def_t { /* missing: CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */ #define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \ - CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \ - CPUID_EXT_MOVBE | CPUID_EXT_HYPERVISOR) + CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | CPUID_EXT_SSE41 | \ + CPUID_EXT_SSE42 | CPUID_EXT_POPCNT | CPUID_EXT_MOVBE | \ + CPUID_EXT_HYPERVISOR) /* missing: CPUID_EXT_PCLMULQDQ, CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_SMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_CID, CPUID_EXT_FMA, CPUID_EXT_XTPR, CPUID_EXT_PDCM, - CPUID_EXT_PCID, CPUID_EXT_DCA, CPUID_EXT_SSE41, CPUID_EXT_SSE42, - CPUID_EXT_X2APIC, CPUID_EXT_TSC_DEADLINE_TIMER, CPUID_EXT_AES, - CPUID_EXT_XSAVE, CPUID_EXT_OSXSAVE, CPUID_EXT_AVX, - CPUID_EXT_F16C, CPUID_EXT_RDRAND */ + CPUID_EXT_PCID, CPUID_EXT_DCA, CPUID_EXT_X2APIC, + CPUID_EXT_TSC_DEADLINE_TIMER, CPUID_EXT_AES, CPUID_EXT_XSAVE, + CPUID_EXT_OSXSAVE, CPUID_EXT_AVX, CPUID_EXT_F16C, + CPUID_EXT_RDRAND */ #define TCG_EXT2_FEATURES ((TCG_FEATURES & CPUID_EXT2_AMD_ALIASES) | \ CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \ CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT) |