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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-10-14 19:20:52 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-10-14 19:20:52 +0000
commit45fd08effd461f85d0480d3b8f85a07751fc55b3 (patch)
tree5949d2fd618f3e535e7d437c7fedd7fff0d8d333 /target-i386
parent7ab064d2b512b13655a0ad9ef2a5f782d798d112 (diff)
target-i386: Add Core Duo Definition
This patch adds a CPU definition for the Core Duo CPU. I tried to resemble the original as closely as possible and document what features are missing still. This patch enables the use of a recent CPU definition on 32 bit platforms. It also fixes two issues that went along the line: - invalid xlevel in core2duo spec While looking though the CPUIDs again, I found that xlevel is actually 8. - non-PSE36 support The CoreDuo CPUID does not expose the PSE36 capability, but CPUID 0x80000008 is tied to 36 bits. This broke Windows XP installation for me, so I just set it to 32 bits width when PSE36 is not available. The original CPU also exposes 32 bit width in CPUID 0x80000008. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5488 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386')
-rw-r--r--target-i386/helper.c21
-rw-r--r--target-i386/op_helper.c5
2 files changed, 24 insertions, 2 deletions
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 94c5c748bf..c2e1a88ad4 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -183,7 +183,7 @@ static x86_def_t x86_defs[] = {
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3,
.ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
/* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
- .xlevel = 0x8000000A,
+ .xlevel = 0x80000008,
.model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
},
#endif
@@ -199,6 +199,25 @@ static x86_def_t x86_defs[] = {
.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
},
{
+ .name = "coreduo",
+ .level = 10,
+ .family = 6,
+ .model = 14,
+ .stepping = 8,
+ /* The original CPU also implements these features:
+ CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
+ CPUID_TM, CPUID_PBE */
+ .features = PPRO_FEATURES | CPUID_VME |
+ CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA,
+ /* The original CPU also implements these ext features:
+ CPUID_EXT_VMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_XTPR,
+ CPUID_EXT_PDCM */
+ .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
+ .ext2_features = CPUID_EXT2_NX,
+ .xlevel = 0x80000008,
+ .model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz",
+ },
+ {
.name = "486",
.level = 0,
.family = 4,
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index e9a6942440..644598a4b9 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -2026,7 +2026,10 @@ void helper_cpuid(void)
#if defined(USE_KQEMU)
EAX = 0x00000020; /* 32 bits physical */
#else
- EAX = 0x00000024; /* 36 bits physical */
+ if (env->cpuid_features & CPUID_PSE36)
+ EAX = 0x00000024; /* 36 bits physical */
+ else
+ EAX = 0x00000020; /* 32 bits physical */
#endif
}
EBX = 0;