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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-08-21 09:32:43 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-08-21 09:32:43 +0000
commit2c8e03018571246e9c332a68ad7c89d2949155ab (patch)
tree15ed554fae11bdeabcb3cb618094ba48885972fb /target-i386
parent81eea5ebb65a987cb376934e86b29c7713ac67f5 (diff)
RSP update fix for x86_64 in iret
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1548 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386')
-rw-r--r--target-i386/helper.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/target-i386/helper.c b/target-i386/helper.c
index fd04430461..c41cbb7278 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -2012,7 +2012,6 @@ static inline void helper_ret_protected(int shift, int is_iret, int addend)
#endif
sp_mask = get_sp_mask(env->segs[R_SS].flags);
sp = ESP;
- /* XXX: ssp is zero in 64 bit ? */
ssp = env->segs[R_SS].base;
new_eflags = 0; /* avoid warning */
#ifdef TARGET_X86_64
@@ -2145,7 +2144,7 @@ static inline void helper_ret_protected(int shift, int is_iret, int addend)
cpu_x86_set_cpl(env, rpl);
sp = new_esp;
#ifdef TARGET_X86_64
- if (shift == 2)
+ if (env->hflags & HF_CS64_MASK)
sp_mask = -1;
else
#endif