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authorIgor Mammedov <imammedo@redhat.com>2012-07-23 15:22:28 +0200
committerAnthony Liguori <aliguori@us.ibm.com>2012-08-01 08:45:06 -0500
commit65dee38052597b6285eb208125369f01b29ba6c1 (patch)
tree3bc62af9c426a665b99a04996e0d08eae6d3ed3a /target-i386
parentdd673288a8ff73ad77fcc1c255486d2466a772e1 (diff)
target-i386: move cpu_reset and reset callback to cpu.c
Moving reset callback into cpu object from board level and resetting cpu at the end of x86_cpu_realize() will allow properly create cpu object during run-time (hotplug) without calling reset externaly. When reset over QOM hierarchy is implemented, reset callback should be removed. v2: - leave cpu_reset in pc_new_cpu() for now, it's to be cleaned up when APIC init is moved in cpu.c Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-i386')
-rw-r--r--target-i386/cpu.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 365c2ffae9..857b94ea87 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -31,6 +31,8 @@
#include "hyperv.h"
+#include "hw/hw.h"
+
/* feature flags taken from "Intel Processor Identification and the CPUID
* Instruction" and AMD's "CPUID Specification". In cases of disagreement
* between feature naming conventions, aliases may be added.
@@ -1702,6 +1704,13 @@ bool cpu_is_bsp(X86CPU *cpu)
{
return cpu_get_apic_base(cpu->env.apic_state) & MSR_IA32_APICBASE_BSP;
}
+
+/* TODO: remove me, when reset over QOM tree is implemented */
+static void x86_cpu_machine_reset_cb(void *opaque)
+{
+ X86CPU *cpu = opaque;
+ cpu_reset(CPU(cpu));
+}
#endif
static void mce_init(X86CPU *cpu)
@@ -1724,8 +1733,13 @@ void x86_cpu_realize(Object *obj, Error **errp)
{
X86CPU *cpu = X86_CPU(obj);
+#ifndef CONFIG_USER_ONLY
+ qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
+#endif
+
mce_init(cpu);
qemu_init_vcpu(&cpu->env);
+ cpu_reset(CPU(cpu));
}
static void x86_cpu_initfn(Object *obj)