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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-04-22 21:34:25 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-04-22 21:34:25 +0000 |
commit | d64477afa1e2589febd78a681809b361330f2ca9 (patch) | |
tree | c64f1e638ccceed7dbc2e11252ff4328161491f5 /target-i386/translate.c | |
parent | f6bac3809f0a27e9b2d6f85571d02420d1fe70d4 (diff) |
imul imm8 fix - 0x82 opcode support (Hidemi KAWAI)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@735 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/translate.c')
-rw-r--r-- | target-i386/translate.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c index 3ef614652e..4bddba56a3 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1938,6 +1938,7 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) case 0x80: /* GRP1 */ case 0x81: + case 0x82: case 0x83: { int val; @@ -1963,6 +1964,7 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) default: case 0x80: case 0x81: + case 0x82: val = insn_get(s, ot); break; case 0x83: @@ -2242,7 +2244,7 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) val = insn_get(s, ot); gen_op_movl_T1_im(val); } else if (b == 0x6b) { - val = insn_get(s, OT_BYTE); + val = (int8_t)insn_get(s, OT_BYTE); gen_op_movl_T1_im(val); } else { gen_op_mov_TN_reg[ot][1][reg](); |