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authorRichard Henderson <rth@twiddle.net>2015-07-02 15:57:14 +0100
committerRichard Henderson <rth@twiddle.net>2016-02-13 07:59:59 +1100
commitf4f1110e4b34797ddfa87bb28f9518b9256778be (patch)
treef88a66e3425e0e9d616200c2e566bd07a65dc44d /target-i386/translate.c
parentc9cfe8f9fb21f086e24b3a8f7ccd9c06e4d8d9d6 (diff)
target-i386: Enable control registers for MPX
Enable and disable at CPL changes, MSR changes, and XRSTOR changes. Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-i386/translate.c')
-rw-r--r--target-i386/translate.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c
index ce2ffc1bca..dc87e5861d 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7633,6 +7633,11 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
tcg_gen_concat_tl_i64(cpu_tmp1_i64, cpu_regs[R_EAX],
cpu_regs[R_EDX]);
gen_helper_xrstor(cpu_env, cpu_A0, cpu_tmp1_i64);
+ /* XRSTOR is how MPX is enabled, which changes how
+ we translate. Thus we need to end the TB. */
+ gen_update_cc_op(s);
+ gen_jmp_im(s->pc - s->cs_base);
+ gen_eob(s);
break;
CASE_MEM_OP(6): /* xsaveopt / clwb */