diff options
| author | Richard Henderson <rth@twiddle.net> | 2015-12-17 11:19:25 -0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-02-09 15:46:54 +0100 |
| commit | 4e85057b92d214decf10045d3d4faa2faf33d100 (patch) | |
| tree | 25c70420f479dc885b409885ca74fda698607935 /target-i386/translate.c | |
| parent | 2045f04c3ae030bda650f84035f114bbd84909a9 (diff) | |
target-i386: Tidy gen_add_A0_im
Merge gen_op_addl_A0_im and gen_op_addq_A0_im into gen_add_A0_im
and clean up the ifdef.
Replace the one remaining user of gen_op_addl_A0_im with gen_add_A0_im.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1450379966-28198-10-git-send-email-rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target-i386/translate.c')
| -rw-r--r-- | target-i386/translate.c | 27 |
1 files changed, 5 insertions, 22 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c index 7a71425988..1291caf020 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -373,29 +373,12 @@ static inline void gen_op_mov_v_reg(TCGMemOp ot, TCGv t0, int reg) } } -static inline void gen_op_addl_A0_im(int32_t val) -{ - tcg_gen_addi_tl(cpu_A0, cpu_A0, val); -#ifdef TARGET_X86_64 - tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff); -#endif -} - -#ifdef TARGET_X86_64 -static inline void gen_op_addq_A0_im(int64_t val) -{ - tcg_gen_addi_tl(cpu_A0, cpu_A0, val); -} -#endif - static void gen_add_A0_im(DisasContext *s, int val) { -#ifdef TARGET_X86_64 - if (CODE64(s)) - gen_op_addq_A0_im(val); - else -#endif - gen_op_addl_A0_im(val); + tcg_gen_addi_tl(cpu_A0, cpu_A0, val); + if (!CODE64(s)) { + tcg_gen_ext32u_tl(cpu_A0, cpu_A0); + } } static inline void gen_op_jmp_v(TCGv dest) @@ -6229,7 +6212,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, exception */ gen_op_jmp_v(cpu_T[0]); /* pop selector */ - gen_op_addl_A0_im(1 << dflag); + gen_add_A0_im(s, 1 << dflag); gen_op_ld_v(s, dflag, cpu_T[0], cpu_A0); gen_op_movl_seg_T0_vm(R_CS); /* add stack offset */ |