diff options
author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-22 09:36:08 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-22 09:36:08 +0000 |
commit | 1130328ecb4a247d00fa820768631d93facc832c (patch) | |
tree | 09601c5934342bf265026c2148460652e33ead9f /target-i386/translate.c | |
parent | d6205959f95cb51799ff729549845a1730f13092 (diff) |
cmpxchg 64 bit fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4521 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/translate.c')
-rw-r--r-- | target-i386/translate.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c index c668722349..85b3d6db4a 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -4286,7 +4286,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x1b0: case 0x1b1: /* cmpxchg Ev, Gv */ { - int label1; + int label1, label2; if ((b & 1) == 0) ot = OT_BYTE; @@ -4309,12 +4309,18 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) tcg_gen_sub_tl(cpu_T3, cpu_T3, cpu_T[0]); gen_extu(ot, cpu_T3); tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T3, tcg_const_tl(0), label1); - tcg_gen_mov_tl(cpu_T[1], cpu_T[0]); - gen_op_mov_reg_T0(ot, R_EAX); - gen_set_label(label1); if (mod == 3) { + label2 = gen_new_label(); + gen_op_mov_reg_T0(ot, R_EAX); + tcg_gen_br(label2); + gen_set_label(label1); gen_op_mov_reg_T1(ot, rm); + gen_set_label(label2); } else { + tcg_gen_mov_tl(cpu_T[1], cpu_T[0]); + gen_op_mov_reg_T0(ot, R_EAX); + gen_set_label(label1); + /* always store */ gen_op_st_T1_A0(ot + s->mem_index); } tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]); |