diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-12-02 22:01:31 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-12-02 22:01:31 +0000 |
| commit | d36cd60e6c8c66e0279bad4b17e2d23833eb20b9 (patch) | |
| tree | b79169496fd7c305de1e6a60bc362e0d0f5efd2d /target-i386/translate.c | |
| parent | 5e809a80955cda9c4053fac02411edff733b4840 (diff) | |
P4 style multiplication eflags
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@481 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/translate.c')
| -rw-r--r-- | target-i386/translate.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c index 9c5c52e4b2..35067bff62 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -2016,31 +2016,35 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) switch(ot) { case OT_BYTE: gen_op_mulb_AL_T0(); + s->cc_op = CC_OP_MULB; break; case OT_WORD: gen_op_mulw_AX_T0(); + s->cc_op = CC_OP_MULW; break; default: case OT_LONG: gen_op_mull_EAX_T0(); + s->cc_op = CC_OP_MULL; break; } - s->cc_op = CC_OP_MUL; break; case 5: /* imul */ switch(ot) { case OT_BYTE: gen_op_imulb_AL_T0(); + s->cc_op = CC_OP_MULB; break; case OT_WORD: gen_op_imulw_AX_T0(); + s->cc_op = CC_OP_MULW; break; default: case OT_LONG: gen_op_imull_EAX_T0(); + s->cc_op = CC_OP_MULL; break; } - s->cc_op = CC_OP_MUL; break; case 6: /* div */ switch(ot) { @@ -2235,7 +2239,7 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start) gen_op_imulw_T0_T1(); } gen_op_mov_reg_T0[ot][reg](); - s->cc_op = CC_OP_MUL; + s->cc_op = CC_OP_MULB + ot; break; case 0x1c0: case 0x1c1: /* xadd Ev, Gv */ |