diff options
| author | Anthony Liguori <aliguori@us.ibm.com> | 2013-03-14 14:50:58 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-03-14 14:50:58 -0500 |
| commit | 3d34a4110c58bba120bc3d7c96c4b9571994c2a8 (patch) | |
| tree | 7bbd137a5886c67352f77ee11a94009ad4af52cd /target-i386/seg_helper.c | |
| parent | 0ec4a8e63ce5244cdb2aa8ef93427898e3f6631b (diff) | |
| parent | 0ad6773f1151c9e172b0b714aada78655dda4cf4 (diff) | |
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
# By Andreas Färber (16) and Igor Mammedov (1)
# Via Andreas Färber
* afaerber/qom-cpu:
target-lm32: Update VMStateDescription to LM32CPU
target-arm: Override do_interrupt for ARMv7-M profile
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
cpu: Pass CPUState to cpu_interrupt()
exec: Pass CPUState to cpu_reset_interrupt()
cpu: Move halted and interrupt_request fields to CPUState
target-cris/helper.c: Update Coding Style
target-i386: Update VMStateDescription to X86CPU
cpu: Introduce cpu_class_set_vmsd()
cpu: Register VMStateDescription through CPUState
stubs: Add a vmstate_dummy struct for CONFIG_USER_ONLY
vmstate: Make vmstate_register() static inline
target-sh4: Move PVR/PRR/CVR into SuperHCPUClass
target-sh4: Introduce SuperHCPU subclasses
cpus: Replace open-coded CPU loop in qmp_memsave() with qemu_get_cpu()
monitor: Use qemu_get_cpu() in monitor_set_cpu()
cpu: Fix qemu_get_cpu() to return NULL if CPU not found
Diffstat (limited to 'target-i386/seg_helper.c')
| -rw-r--r-- | target-i386/seg_helper.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index 3247deeb60..906e4f3d20 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -1231,8 +1231,11 @@ static void do_interrupt_all(CPUX86State *env, int intno, int is_int, #endif } -void do_interrupt(CPUX86State *env) +void x86_cpu_do_interrupt(CPUState *cs) { + X86CPU *cpu = X86_CPU(cs); + CPUX86State *env = &cpu->env; + #if defined(CONFIG_USER_ONLY) /* if user mode only, we simulate a fake exception which will be handled outside the cpu execution |