x86_64 target support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1197 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 69 insertions, 15 deletions

diff --git a/target-i386/opreg_template.h b/target-i386/opreg_template.h
index 16a43f2db0..648063650b 100644
--- a/target-i386/opreg_template.h
+++ b/target-i386/opreg_template.h
@@ -20,29 +20,56 @@
  */
 void OPPROTO glue(op_movl_A0,REGNAME)(void)
 {
-    A0 = REG;
+    A0 = (uint32_t)REG;
 }
 
 void OPPROTO glue(op_addl_A0,REGNAME)(void)
 {
-    A0 += REG;
+    A0 = (uint32_t)(A0 + REG);
 }
 
 void OPPROTO glue(glue(op_addl_A0,REGNAME),_s1)(void)
 {
-    A0 += REG << 1;
+    A0 = (uint32_t)(A0 + (REG << 1));
 }
 
 void OPPROTO glue(glue(op_addl_A0,REGNAME),_s2)(void)
 {
-    A0 += REG << 2;
+    A0 = (uint32_t)(A0 + (REG << 2));
 }
 
 void OPPROTO glue(glue(op_addl_A0,REGNAME),_s3)(void)
 {
-    A0 += REG << 3;
+    A0 = (uint32_t)(A0 + (REG << 3));
+}
+
+#ifdef TARGET_X86_64
+void OPPROTO glue(op_movq_A0,REGNAME)(void)
+{
+    A0 = REG;
+}
+
+void OPPROTO glue(op_addq_A0,REGNAME)(void)
+{
+    A0 = (A0 + REG);
+}
+
+void OPPROTO glue(glue(op_addq_A0,REGNAME),_s1)(void)
+{
+    A0 = (A0 + (REG << 1));
+}
+
+void OPPROTO glue(glue(op_addq_A0,REGNAME),_s2)(void)
+{
+    A0 = (A0 + (REG << 2));
 }
 
+void OPPROTO glue(glue(op_addq_A0,REGNAME),_s3)(void)
+{
+    A0 = (A0 + (REG << 3));
+}
+#endif
+
 void OPPROTO glue(op_movl_T0,REGNAME)(void)
 {
     T0 = REG;
@@ -65,72 +92,99 @@ void OPPROTO glue(op_movh_T1,REGNAME)(void)
 
 void OPPROTO glue(glue(op_movl,REGNAME),_T0)(void)
 {
-    REG = T0;
+    REG = (uint32_t)T0;
 }
 
 void OPPROTO glue(glue(op_movl,REGNAME),_T1)(void)
 {
-    REG = T1;
+    REG = (uint32_t)T1;
 }
 
 void OPPROTO glue(glue(op_movl,REGNAME),_A0)(void)
 {
+    REG = (uint32_t)A0;
+}
+
+#ifdef TARGET_X86_64
+void OPPROTO glue(glue(op_movq,REGNAME),_T0)(void)
+{
+    REG = T0;
+}
+
+void OPPROTO glue(glue(op_movq,REGNAME),_T1)(void)
+{
+    REG = T1;
+}
+
+void OPPROTO glue(glue(op_movq,REGNAME),_A0)(void)
+{
     REG = A0;
 }
+#endif
 
 /* mov T1 to REG if T0 is true */
 void OPPROTO glue(glue(op_cmovw,REGNAME),_T1_T0)(void)
 {
     if (T0)
-        REG = (REG & 0xffff0000) | (T1 & 0xffff);
+        REG = (REG & ~0xffff) | (T1 & 0xffff);
     FORCE_RET();
 }
 
 void OPPROTO glue(glue(op_cmovl,REGNAME),_T1_T0)(void)
 {
     if (T0)
+        REG = (uint32_t)T1;
+    FORCE_RET();
+}
+
+#ifdef TARGET_X86_64
+void OPPROTO glue(glue(op_cmovq,REGNAME),_T1_T0)(void)
+{
+    if (T0)
         REG = T1;
     FORCE_RET();
 }
+#endif
 
 /* NOTE: T0 high order bits are ignored */
 void OPPROTO glue(glue(op_movw,REGNAME),_T0)(void)
 {
-    REG = (REG & 0xffff0000) | (T0 & 0xffff);
+    REG = (REG & ~0xffff) | (T0 & 0xffff);
 }
 
 /* NOTE: T0 high order bits are ignored */
 void OPPROTO glue(glue(op_movw,REGNAME),_T1)(void)
 {
-    REG = (REG & 0xffff0000) | (T1 & 0xffff);
+    REG = (REG & ~0xffff) | (T1 & 0xffff);
 }
 
 /* NOTE: A0 high order bits are ignored */
 void OPPROTO glue(glue(op_movw,REGNAME),_A0)(void)
 {
-    REG = (REG & 0xffff0000) | (A0 & 0xffff);
+    REG = (REG & ~0xffff) | (A0 & 0xffff);
 }
 
 /* NOTE: T0 high order bits are ignored */
 void OPPROTO glue(glue(op_movb,REGNAME),_T0)(void)
 {
-    REG = (REG & 0xffffff00) | (T0 & 0xff);
+    REG = (REG & ~0xff) | (T0 & 0xff);
 }
 
 /* NOTE: T0 high order bits are ignored */
 void OPPROTO glue(glue(op_movh,REGNAME),_T0)(void)
 {
-    REG = (REG & 0xffff00ff) | ((T0 & 0xff) << 8);
+    REG = (REG & ~0xff00) | ((T0 & 0xff) << 8);
 }
 
 /* NOTE: T1 high order bits are ignored */
 void OPPROTO glue(glue(op_movb,REGNAME),_T1)(void)
 {
-    REG = (REG & 0xffffff00) | (T1 & 0xff);
+    REG = (REG & ~0xff) | (T1 & 0xff);
 }
 
 /* NOTE: T1 high order bits are ignored */
 void OPPROTO glue(glue(op_movh,REGNAME),_T1)(void)
 {
-    REG = (REG & 0xffff00ff) | ((T1 & 0xff) << 8);
+    REG = (REG & ~0xff00) | ((T1 & 0xff) << 8);
 }
+