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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-04-27 21:12:55 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-04-27 21:12:55 +0000
commit00f82b8a3166514f634c1c010c3b6175bcc6403b (patch)
tree31d41d48d7207ee9be02483f6a3c951f9075c371 /target-i386/helper2.c
parentc1d00dc0b432813f29baac7ec62e4cec09949765 (diff)
Use correct types to enable > 2G support, based on a patch from
Anthony Liguori. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4265 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/helper2.c')
-rw-r--r--target-i386/helper2.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/target-i386/helper2.c b/target-i386/helper2.c
index 106720aa7f..6cf218fa0d 100644
--- a/target-i386/helper2.c
+++ b/target-i386/helper2.c
@@ -800,8 +800,17 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
#else
-/* Bits 52-62 of a PTE are reserved. Bit 63 is the NX bit. */
-#define PHYS_ADDR_MASK 0xffffffffff000L
+/* XXX: This value should match the one returned by CPUID
+ * and in exec.c */
+#if defined(USE_KQEMU)
+#define PHYS_ADDR_MASK 0xfffff000L
+#else
+# if defined(TARGET_X86_64)
+# define PHYS_ADDR_MASK 0xfffffff000L
+# else
+# define PHYS_ADDR_MASK 0xffffff000L
+# endif
+#endif
/* return value:
-1 = cannot handle fault