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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-04 13:35:58 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-04 13:35:58 +0000
commit5efc27bbb695017a7386cb9acef247b9dd29f2b6 (patch)
treeae548e9fefe807ce7583bec2dea3429f9895e357 /target-i386/cpu.h
parentf2289cb6924afc97b2a75d21bfc9217024d11741 (diff)
EFER loading fixes, including SVME bit
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4659 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r--target-i386/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index d9253a14ed..76d2e7be73 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -148,7 +148,7 @@
#define HF_GIF_SHIFT 20 /* if set CPU takes interrupts */
#define HF_HIF_SHIFT 21 /* shadow copy of IF_MASK when in SVM */
#define HF_NMI_SHIFT 22 /* CPU serving NMI */
-#define HF_SVME_SHIFT 23 /* SVME enabled (copy of EFER.SVME */
+#define HF_SVME_SHIFT 23 /* SVME enabled (copy of EFER.SVME) */
#define HF_SVMI_SHIFT 24 /* SVM intercepts are active */
#define HF_CPL_MASK (3 << HF_CPL_SHIFT)