diff options
author | Blue Swirl <blauwirbel@gmail.com> | 2010-06-19 10:42:34 +0300 |
---|---|---|
committer | Blue Swirl <blauwirbel@gmail.com> | 2010-06-19 10:42:34 +0300 |
commit | 0e26b7b892e1369d66da63b748acbfb6b3819a59 (patch) | |
tree | 4a67dca5b6529bebac524e757f99eb987dd0c653 /target-i386/cpu.h | |
parent | 4a942ceac7e38c259116960e45ba9619611d1df9 (diff) |
apic: avoid using CPUState internals
Move the actual CPUState contents handling to cpu.h and cpuid.c.
Handle CPU reset and set env->halted in pc.c.
Add a function to get the local APIC state of the current
CPU for the MMIO.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r-- | target-i386/cpu.h | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 0b19fe3863..619a747d76 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -790,6 +790,17 @@ static inline void cpu_x86_load_seg_cache(CPUX86State *env, } } +static inline void cpu_x86_load_seg_cache_sipi(CPUX86State *env, + int sipi_vector) +{ + env->eip = 0; + cpu_x86_load_seg_cache(env, R_CS, sipi_vector << 8, + sipi_vector << 12, + env->segs[R_CS].limit, + env->segs[R_CS].flags); + env->halted = 0; +} + int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector, target_ulong *base, unsigned int *limit, unsigned int *flags); @@ -827,6 +838,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx); int cpu_x86_register (CPUX86State *env, const char *cpu_model); +void cpu_clear_apic_feature(CPUX86State *env); /* helper.c */ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, @@ -859,15 +871,6 @@ void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0); void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3); void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4); -/* hw/apic.c */ -typedef struct APICState APICState; -void cpu_set_apic_base(APICState *s, uint64_t val); -uint64_t cpu_get_apic_base(APICState *s); -void cpu_set_apic_tpr(APICState *s, uint8_t val); -#ifndef NO_CPU_IO_DEFS -uint8_t cpu_get_apic_tpr(APICState *s); -#endif - /* hw/pc.c */ void cpu_smm_update(CPUX86State *env); uint64_t cpu_get_tsc(CPUX86State *env); @@ -929,6 +932,10 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) #include "svm.h" +#if !defined(CONFIG_USER_ONLY) +#include "hw/apic.h" +#endif + static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) { env->eip = tb->pc - tb->cs_base; @@ -943,8 +950,6 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, (env->eflags & (IOPL_MASK | TF_MASK | RF_MASK | VM_MASK)); } -void apic_init_reset(APICState *s); -void apic_sipi(APICState *s); void do_cpu_init(CPUState *env); void do_cpu_sipi(CPUState *env); #endif /* CPU_I386_H */ |