diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-02-16 22:11:32 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-02-16 22:11:32 +0000 |
| commit | 58fe2f10f0e9ddd63bc6004776ef6e874101e9c5 (patch) | |
| tree | bf7a875031f2372018c12a62b11f7c23457aed49 /target-i386/cpu.h | |
| parent | 3a1d9b8bbb693d18a346552a5e98c96ad5006ff9 (diff) | |
experimental code copy support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@623 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
| -rw-r--r-- | target-i386/cpu.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 676e6ceae3..99c6bb98c1 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -24,6 +24,10 @@ #include "cpu-defs.h" +#if defined(__i386__) && !defined(CONFIG_SOFTMMU) +#define USE_CODE_COPY +#endif + #define R_EAX 0 #define R_ECX 1 #define R_EDX 2 @@ -121,6 +125,7 @@ #define HF_SS32_MASK (1 << HF_SS32_SHIFT) #define HF_ADDSEG_MASK (1 << HF_ADDSEG_SHIFT) #define HF_PE_MASK (1 << HF_PE_SHIFT) +#define HF_TF_MASK (1 << HF_TF_SHIFT) #define CR0_PE_MASK (1 << 0) #define CR0_TS_MASK (1 << 3) @@ -297,6 +302,10 @@ typedef struct CPUX86State { uint32_t sysenter_cs; uint32_t sysenter_esp; uint32_t sysenter_eip; + + /* temporary data for USE_CODE_COPY mode */ + uint32_t tmp0; + uint32_t saved_esp; /* exception/interrupt handling */ jmp_buf jmp_env; |