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authorHaozhong Zhang <haozhong.zhang@intel.com>2016-06-23 14:15:43 +0800
committerEduardo Habkost <ehabkost@redhat.com>2016-07-07 15:25:31 -0300
commit217f1b4a72153cf8d556e9d45919e9222c38d25e (patch)
treee0a87bb9de8d94200d6aa5960490ecdc312eddbd /target-i386/cpu.h
parent87f8b626041ceaea9adcfdbd549359f0ca7b871d (diff)
target-i386: Publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg
It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should be set before some features (e.g. VMX and LMCE) can be used, which is usually done by the firmware. This patch adds a fw_cfg file "etc/msr_feature_control" which contains the advised value of MSR_IA32_FEATURE_CONTROL and can be used by guest firmware (e.g. SeaBIOS). Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r--target-i386/cpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 54c3fd6561..5c7a2791f3 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -332,6 +332,10 @@
#define MSR_TSC_ADJUST 0x0000003b
#define MSR_IA32_TSCDEADLINE 0x6e0
+#define FEATURE_CONTROL_LOCKED (1<<0)
+#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
+#define FEATURE_CONTROL_LMCE (1<<20)
+
#define MSR_P6_PERFCTR0 0xc1
#define MSR_IA32_SMBASE 0x9e