diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-02-25 23:17:58 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-02-25 23:17:58 +0000 |
| commit | 7eee2a509a9a777aafd0c2efb14b837b83a8df9c (patch) | |
| tree | 4e749310885edf2ea3818b2f07defd016fd4f303 /target-i386/cpu.h | |
| parent | 42c3c0cceddee64c22024e3e92ed636e75ea9c77 (diff) | |
CR0.MP/EM/TS support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@642 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
| -rw-r--r-- | target-i386/cpu.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 99c6bb98c1..84b202659a 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -115,6 +115,9 @@ /* copy of CR0.PE (protected mode) */ #define HF_PE_SHIFT 7 #define HF_TF_SHIFT 8 /* must be same as eflags */ +#define HF_MP_SHIFT 9 /* the order must be MP, EM, TS */ +#define HF_EM_SHIFT 10 +#define HF_TS_SHIFT 11 #define HF_IOPL_SHIFT 12 /* must be same as eflags */ #define HF_VM_SHIFT 17 /* must be same as eflags */ @@ -126,9 +129,15 @@ #define HF_ADDSEG_MASK (1 << HF_ADDSEG_SHIFT) #define HF_PE_MASK (1 << HF_PE_SHIFT) #define HF_TF_MASK (1 << HF_TF_SHIFT) +#define HF_MP_MASK (1 << HF_MP_SHIFT) +#define HF_EM_MASK (1 << HF_EM_SHIFT) +#define HF_TS_MASK (1 << HF_TS_SHIFT) #define CR0_PE_MASK (1 << 0) +#define CR0_MP_MASK (1 << 1) +#define CR0_EM_MASK (1 << 2) #define CR0_TS_MASK (1 << 3) +#define CR0_NE_MASK (1 << 5) #define CR0_WP_MASK (1 << 16) #define CR0_AM_MASK (1 << 18) #define CR0_PG_MASK (1 << 31) @@ -280,7 +289,7 @@ typedef struct CPUX86State { unsigned int fpus; unsigned int fpuc; uint8_t fptags[8]; /* 0 = valid, 1 = empty */ - CPU86_LDouble fpregs[8]; + CPU86_LDouble fpregs[8]; /* emulator internal variables */ CPU86_LDouble ft0; @@ -304,8 +313,11 @@ typedef struct CPUX86State { uint32_t sysenter_eip; /* temporary data for USE_CODE_COPY mode */ +#ifdef USE_CODE_COPY uint32_t tmp0; uint32_t saved_esp; + int native_fp_regs; /* if true, the FPU state is in the native CPU regs */ +#endif /* exception/interrupt handling */ jmp_buf jmp_env; |