diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-05-08 21:08:41 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-05-08 21:08:41 +0000 |
| commit | 2ee73ac3a855fb0cfba3db91fdd1ecebdbc6f971 (patch) | |
| tree | 9759c191fd2b12e00749c4ea4b45298c9336c35c /target-i386/cpu.h | |
| parent | 28c3ee3fed3bb51c45320bec1ede3585cd36f8a4 (diff) | |
division by zero FPU exception support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@795 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
| -rw-r--r-- | target-i386/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 6b2a89bb9a..6939a2c6e6 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -143,6 +143,7 @@ #define CR0_MP_MASK (1 << 1) #define CR0_EM_MASK (1 << 2) #define CR0_TS_MASK (1 << 3) +#define CR0_ET_MASK (1 << 4) #define CR0_NE_MASK (1 << 5) #define CR0_WP_MASK (1 << 16) #define CR0_AM_MASK (1 << 18) @@ -373,6 +374,8 @@ CPUX86State *cpu_x86_init(void); int cpu_x86_exec(CPUX86State *s); void cpu_x86_close(CPUX86State *s); int cpu_get_pic_interrupt(CPUX86State *s); +/* MSDOS compatibility mode FPU exception support */ +void cpu_set_ferr(CPUX86State *s); /* this function must always be used to load data in the segment cache: it synchronizes the hflags with the segment cache values */ |